IDT77V011L155DA IDT, Integrated Device Technology Inc, IDT77V011L155DA Datasheet - Page 25

• Manufacturer Part Number: IDT77V011L155DA
• Description: INTERFACE DPI-UTOPIA 144-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT77V011L155DA

• Interface: DPI, UTOPIA
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 144-TQFP, 144-VQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Applications: -
• Other names: 77V011L155DA

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tion. It can be up to four bytes long, and be added to the beginning or
end of the cell.
done with external pins and internal registers, with each direction being
individually programmed. Registers associated with the TAG are listed in
the Transmit and Receive TAG Register Table.
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external pins and then programming the internal registers. The external
pins are multiplexed with the MBUS[9:5] pins.
This value can be from zero to four and is set with the MBUS[7:5] pins at
reset. This value is stored in Rx TAG Size bits of the Rx TAG register.
beginning or end of the cell. Setting this bit to a zero indicates that the
TAG is appended to the beginning of the cell, while setting this bit to a
one indicates the TAG is appended to the end of the cell. This register bit
is programmed at reset with the MBUS[8] pin and is stored in Rx TAG
Location bit of the Rx TAG register.
whether the HEC byte should be removed or not. Setting this bit to zero
will indicate not to remove the HEC byte, while setting it to a one will
remove the HEC byte. This value is stored in the Rx Remove HEC bit of
the Rx TAG register.
TAG. This value is only used for all cells. The default value is
0x000001FX, which can be changed by writing to the registers with In-
Stream™ cells.
move the PT and CLP fields of the ATM cell header into the four bytes of
TAG area. Setting this bit to zero will not move these fields, while setting
it to a one will move these fields from the incoming cell header to the
TAG area. This enables a DPI device or SWITCHStAR that is switching
on the TAG area to find OAM cells, do low priority cell discards and EFCI
processing. This option is only valid if using all four bytes of TAG and
switching is being done on the TAG appended to the beginning of the
cell. This option is not valid when a TAG is appended to the end of the
cell.
TAG Register Table.
IDT77V011
A TAG can be added to the cell in either the transmit or receive direc-
Programming a TAG for both the transmit and receive direction is
A TAG is added in the receive direction by first configuring the
The Rx TAG Size [2:0] indicates the size of the TAG to be appended.
Rx Remove HEC is defined by pin MBUS[9] at reset and indicates
The TAG 1, 2, 3 and 4 registers contain the header value used for the
Rx Move PT/CLP bit, of the Configuration 1 register, is an option to
Registers associated with the Receive TAG are listed in the Receive
The Rx TAG Location indicates whether the TAG is located at the
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and then programming the internal registers. The external pins are multi-
plexed with the MBUS[4:0] bus.
not to OR the EFCI bit of the cell header with the EFCI bit of the TAG
area appended to the beginning of the cell, and place the OR'ed EFCI
bit in the cell header. Setting this bit to zero will select not to OR the
EFCI bits, while setting it to a one will OR the EFCI bits. This option is
not valid when the TAG is appended to the end of the cell.
the cell. This value is set with the MBUS[2:0] pins at reset and is stored
in bits [2:0] of the Tx TAG register. Valid values for this field are zero to
four.
ning or end of the cell. Setting this bit to a zero indicates the TAG is
located at the beginning of the cell, while setting this bit to a one indi-
cates that the TAG is located at the end of the cell. This value is
programmed at reset with the MBUS[3] pin and is stored in the Tx TAG
Location bit of the Tx TAG register.
cell. Setting this bit to a zero indicates not to add the HEC byte, while
setting it to a one indicates to add the HEC byte. This value is
programmed at reset with the MBUS[4] pin and is stored in Tx ADD HEC
bit of the Tx TAG register.
TAG. This value is only used for In-Stream™ cells. The default value is
0x000001FX, which can be changed by writing to the registers with In-
Stream™ cells.
to move the PT/CLP fields from the 4-byte TAG area appended to the
beginning of the cell to the cell header. Setting this bit to a zero will not
move the fields, while setting it to a one will move the PT/CLP fields.
This option is not valid when the TAG is appended to the end of the cell.
TAG Register Table.
A transmit TAG is programmed by first configuring the external pins
The Copy EFCI bit, of the Configuration 1 register, selects whether or
Tx TAG Size [2:0] indicates the size of the TAG to be removed from
Tx TAG Location indicates whether the TAG is located at the begin-
Tx Add HEC indicates if a HEC placeholder should be added to the
The TAG 1, 2, 3 and 4 registers contain the header value used for the
The Tx Move PT/CLP bit, of the Configuration 1 register, is an option
Registers associated with the Transmit TAG are listed in the Transmit
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March 15, 2001