N25Q128A11BSF40F Numonyx - A DIVISION OF MICRON SEMICONDUCTOR PRODUCTS, INC., N25Q128A11BSF40F Datasheet - Page 105

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N25Q128A11BSF40F

Manufacturer Part Number
N25Q128A11BSF40F
Description
IC SRL FLASH 128MB NMX 16-SOIC
Manufacturer
Numonyx - A DIVISION OF MICRON SEMICONDUCTOR PRODUCTS, INC.
Series
Forté™r
Datasheet

Specifications of N25Q128A11BSF40F

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
128M (16M x 8)
Speed
108MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
1.7 V ~ 2 V
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (0.295", 7.50mm Width)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
N25Q128A11BSF40F

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
N25Q128A11BSF40F
Manufacturer:
MICRON
Quantity:
1 200
Table 21.
1. Values of (b1, b0) after power-up are defined in
9.1.25
b7-b2
S
C
DQ0
Bit
b1
b0
Sector Lock
Write Lock
Bit name
Sector
Down
Lock Register out
Write to Lock Register (WRLR)
The Write to Lock Register (WRLR) instruction allows bits to be changed in the Lock
Registers. Before it can be accepted, a Write Enable (WREN) instruction must previously
have been executed. After the Write Enable (WREN) instruction has been decoded, the
device sets the Write Enable Latch (WEL).
The Write to Lock Register (WRLR) instruction is entered by driving Chip Select (S) Low,
followed by the instruction code, three address bytes (pointing to any address in the
targeted sector and one data byte on Serial Data input (DQ0). The instruction sequence is
shown in Figure 22. Chip Select (S) must be driven High after the eighth bit of the data byte
has been latched in, otherwise the Write to Lock Register (WRLR) instruction is not
executed.
Lock Register bits are volatile, and therefore do not require time to be written. When the
Write to Lock Register (WRLR) instruction has been successfully executed, the Write
Enable Latch (WEL) bit is reset after a delay time less than tSHSL minimum value.
Any Write to Lock Register (WRLR) instruction, while an Erase, Program or Write cycle is in
progress, is rejected without having any effects on the cycle that is in progress.
Figure 33. Write to Lock Register instruction sequence
0
1
2
Instruction
Value
‘1’
‘0’
‘1’
‘0’
3
4
The Write Lock and Lock Down bits cannot be changed. Once a ‘1’ is written to the
Lock Down bit it cannot be cleared to ‘0’, except by a power-up.
The Write Lock and Lock Down bits can be changed by writing new values to them.
Write, Program and Erase operations in this sector will not be executed. The
memory contents will not be changed.
Write, Program and Erase operations in this sector are executed and will modify the
sector contents.
5
(1)
6
7
MSB
23
8
Section 7: Protection
22 21
9 10
24-bit address
Reserved
3
28 29 30 31 32 33 34 35
2
modes.
1
Function
0
MSB
7
6
Lock register
5
4
in
3
36 37 38
2
1
0
39
AI13740
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