N25Q128A11BSF40F Numonyx - A DIVISION OF MICRON SEMICONDUCTOR PRODUCTS, INC., N25Q128A11BSF40F Datasheet - Page 86

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N25Q128A11BSF40F

Manufacturer Part Number
N25Q128A11BSF40F
Description
IC SRL FLASH 128MB NMX 16-SOIC
Manufacturer
Numonyx - A DIVISION OF MICRON SEMICONDUCTOR PRODUCTS, INC.
Series
Forté™r
Datasheet

Specifications of N25Q128A11BSF40F

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
128M (16M x 8)
Speed
108MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
1.7 V ~ 2 V
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (0.295", 7.50mm Width)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
N25Q128A11BSF40F

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
N25Q128A11BSF40F
Manufacturer:
MICRON
Quantity:
1 200
9.1.8
86/185
DQ0
DQ3
DQ1
DQ2
C
S
Mode 3
Mode 0
Figure 16. Quad Input/ Output Fast Read instruction sequence
Read OTP (ROTP)
The device is first selected by driving Chip Select (S) Low. The instruction code for the Read
OTP (ROTP) instruction is followed by a 3-byte address (A23- A0) and a dummy byte. Each
bit is latched in on the rising edge of Serial Clock (C).
Then the memory contents at that address are shifted out on Serial Data output (DQ1).
Each bit is shifted out at the maximum frequency, fCmax, on the falling edge of Serial Clock
(C). The instruction sequence is shown in Figure 17.
The address is automatically incremented to the next higher address after each byte of data
is shifted out.
There is no rollover mechanism with the Read OTP (ROTP) instruction. This means that the
Read OTP (ROTP) instruction must be sent with a maximum of 65 bytes to read. All other
bytes outside the OTP area are “Don’t Care.”
The Read OTP (ROTP) instruction is terminated by driving Chip Select (S) High. Chip
Select (S) can be driven High at any time during data output. Any Read OTP (ROTP)
instruction issued while an Erase, Program or Write cycle is in progress, is rejected without
having any effect on the cycle that is in progress.
0
‘1’
Don’t Care
Don’t Care
1
2
Instruction
3
4
5
6
7
A23-16 A15-8 A7-0
4
5
6
7
8
2
3
0
1
9 10 11 12 13 14
4
5
6
7
2
3
0
1
6
7
4
5
0
1
2
3
Dummy (ex.: 10)
15 16
21 22 23
Byte 1
24
6
7
4
5
IO switches from Input to Output
Quad_IO_Fast_Read
25
1
2
3
0
26
Byte 2
6
7
4
5
27
1
2
3
0
7
4
5
6

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