MT41J512M4HX-187E:D Micron Technology Inc, MT41J512M4HX-187E:D Datasheet - Page 52

• Manufacturer Part Number: MT41J512M4HX-187E:D
• Description: IC DDR3 SDRAM 2GBIT 78FBGA
• Manufacturer: Micron Technology Inc
• Series: -r

Specifications of MT41J512M4HX-187E:D

• Format - Memory: RAM
• Memory Type: DDR3 SDRAM
• Memory Size: 2G (512M x 4)
• Speed: 533MHz
• Interface: Parallel
• Voltage - Supply: 1.425 V ~ 1.575 V
• Operating Temperature: 0°C ~ 95°C
• Package / Case: 78-TFBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

ODT Characteristics
Figure 21:
Table 32:
ODT Resistors
PDF: 09005aef826aaadc/Source: 09005aef82a357c3
DDR3_D3.fm - Rev G 2/09 EN
Parameter/Condition
R
Deviation of VM with respect to V
TT
effective impedance
On-Die Termination DC Electrical Characteristics
ODT Levels and I-V Characteristics
Notes:
ODT effective resistance R
DM, DQS, DQS#, and TDQS, TDQS# balls (x8 devices only). The ODT target values are
listed in Table 32 and Table 33 on page 53. A functional representation of the ODT is
shown in Figure 21. The individual pull-up and pull-down resistors (R
are defined as follows:
• R
• R
1. Tolerance limits are applicable after proper ZQ calibration has been performed at a stable
2. Measurement definition for R
3. Measure voltage (VM) at the tested pin with no load:
4. For IT devices, the minimum values are derated by 6% when the device operates between –
Table 33 on page 53 provides an overview of the ODT DC electrical characteristics. The
values provided are not specification requirements; however, they can be used as design
guidelines to indicate what R
• R
• R
• R
• R
• R
To
other
circuitry
such as
RCV, . . .
temperature and voltage (V
either the temperature or voltage changes after calibration.
I[V
40°C and 0°C (T
TT PU
TT PD
TT
TT
TT
TT
TT
IH
Chip in termination mode
DD
120Ω is made up of R
60Ω is made up of R
40Ω is made up of R
30Ω is made up of R
20Ω is made up of R
(
AC
Q/2
= (V
= (V
)], then apply V
R
R
TT PU
TT PD
I
I
ODT
PU
PD
OUT
DD
R
TT
Q - V
)/|I
C
ΔVM
Symbol
).
R
=
ΔVM
TT
OUT
OUT
------------------------------------------------------------- -
|I V
_
EFF
(
=
|, under the condition that R
IL
V
)/|I
(
IH AC
IH AC
⎛
⎝
AC
TT
2
----------------- - 1
TT 60PD120
TT 40PD80
TT 30PD60
TT 20PD40
V
(
OUT
(
TT 120PD240
I
) to pin under test and measure current I[V
I
OUT
×
OUT
DD
DD
is defined by MR1[9, 6, and 2]. ODT is applied to the DQ,
TT
52
VM
TT
= I
)
Q = V
) V
Q
|, under the condition that R
is targeted to provide:
) I V
PD
: Apply V
V
V
V
–
–
DQ
DD
OUT
SS
- I
Min
–
Q
(
Q
PU
–5
and R
and R
and R
IL AC
DD
and R
⎞
⎠
IL AC
(
, V
×
and R
Micron Technology, Inc., reserves the right to change products or specifications without notice.
(
100
SS
IH
)
TT 20PU40
TT 40PU80
TT 30PU60
Q = V
(
)
TT 60PU120
See Table 33 on page 53
AC
)|
TT 120PU240
) to pin under test and measure current
Nom
SS
2Gb: x4, x8, x16 DDR3 SDRAM
). Refer to “ODT Sensitivity” on page 53 if
TT PU
is turned off
TT PD
Max
©2006 Micron Technology, Inc. All rights reserved.
ODT Characteristics
+5
is turned off
IL
(
TT PU
AC
)]:
Units
%
and R
TT PD
Notes
1, 2, 3
1, 2
)