DS33ZH11+ Maxim Integrated Products, DS33ZH11+ Datasheet - Page 76

• Manufacturer Part Number: DS33ZH11+
• Description: IC MAPPER ETHERNET 100CSBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS33ZH11+

• Applications: Data Transport
• Interface: Serial
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Package / Case: 100-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 4: Receive Serial Interface Clock Activity Latched Status 1 (RLCALS1) This bit is set to 1 if the receive
clock for Serial Interface 1 has activity. This bit is cleared upon read.
Bit 0: Transmit Serial Interface Clock Activity Latched Status 1 (TSCALS1) This bit is set to 1 if the transmit
clock for Serial Interface 1 has activity. This bit is cleared upon read.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 1: Reference Clock Activity Latched Status (REFCLKS) This bit is set to 1 if REF_CLK has activity. This bit
is cleared upon read.
Bit 0: System Clock Input Latched Status (SYSCLS) This bit is set to 1 if SYSCLKI has activity. This bit is
cleared upon read.
Bit 4: Serial Interface 1 TX Interrupt Enable (LINE1TIE) Setting this bit to 1 enables an interrupt on LIN1TIS
Bit 0: Serial Interface 1 RX Interrupt Enable (LINE1RIE) Setting this bit to 1 enables an interrupt on LIN1RIS
Bit #
Name
Default
Register Name:
Register Description:
Register Address:
7
-
-
7
-
-
7
0
-
6
-
-
6
-
-
GL.SRCALS
Global SDRAM Reference Clock Activity Latched Status
05h
6
0
-
GL.RTCAL
Global Receive and Transmit Serial Port Clock Activity Latched Status
04h
5
5
-
-
-
-
GL.LIE
Global Serial Interface Interrupt Enable
06h
5
0
-
RLCALS1
76 of 172
LIN1TIE
4
-
4
-
-
4
0
3
3
-
-
-
-
3
0
-
2
-
-
2
-
-
2
0
-
REFCLKS
1
-
-
1
-
1
0
-
TLCALS1
SYSCLS
LIN1RIE
0
-
0
-
0
0