74LVC1G53DC,125 NXP Semiconductors, 74LVC1G53DC,125 Datasheet
74LVC1G53DC,125
Specifications of 74LVC1G53DC,125
935279945125
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74LVC1G53DC,125 Summary of contents
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Rev. 06 — 21 June 2010 1. General description The 74LVC1G53 is a low-power, low-voltage, high-speed, Si-gate CMOS device. The 74LVC1G53 provides one analog multiplexer/demultiplexer with a digital select input (S), two independent inputs/outputs (Y0 and ...
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... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name 74LVC1G53DP −40 °C to +125 °C 74LVC1G53DC −40 °C to +125 °C 74LVC1G53GT −40 °C to +125 °C 74LVC1G53GF −40 °C to +125 °C 74LVC1G53GD −40 °C to +125 °C 74LVC1G53GM −40 °C to +125 °C 74LVC1G53GN − ...
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... NXP Semiconductors Fig 2. Logic diagram 6. Pinning information 6.1 Pinning 74LVC1G53 GND 4 GND 001aad388 Fig 3. Pin configuration SOT505-2 and SOT765-1 74LVC1G53 Product data sheet 2-channel analog multiplexer/demultiplexer Fig 4. Pin configuration SOT833-1, SOT1089, SOT1116 and SOT1203 All information provided in this document is subject to legal disclaimers. ...
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... NXP Semiconductors 74LVC1G53 GND 3 GND 4 Transparent top view Fig 5. Pin configuration SOT996-2 6.2 Pin description Table 3. Pin description Symbol Pin SOT505-2, SOT765-1, SOT833-1, SOT1089, SOT996-2, SOT1116 and SOT1203 GND 3 GND Functional description [1] Table 4. Function table Input [ HIGH voltage level LOW voltage level don’t care high-impedance OFF-state. ...
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... NXP Semiconductors 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage I I input clamping current IK I switch clamping current SK V switch voltage SW I switch current ...
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... NXP Semiconductors 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground 0 V). Symbol Parameter Conditions V HIGH-level input voltage LOW-level input voltage input leakage pin S and pin E; I current GND; ...
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... NXP Semiconductors 10.1 Test circuits GND GND Fig 7. Test circuit for measuring OFF-state leakage current GND and V = open circuit Fig 8. Test circuit for measuring ON-state leakage current 10.2 ON resistance Table 8. ON resistance At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graphs see ...
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... NXP Semiconductors Table 8. ON resistance …continued At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graphs see Symbol Parameter Conditions R ON resistance (rail) V ON(rail resistance V ON(flat) I (flatness) [1] Typical values are measured at T amb [2] Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical V temperature ...
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... NXP Semiconductors R (Ω Fig 10. Typical ON resistance as a function of input voltage (Ω (4) (3) (2) ( 0.4 0.8 1.2 = 125 °C. (1) T amb = 85 °C. (2) T amb = 25 °C. (3) T amb = −40 °C. (4) T amb Fig 11. ON resistance as a function of input voltage 1 74LVC1G53 Product data sheet ...
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... NXP Semiconductors (Ω) 11 (1) 9 (2) ( 0.5 1.0 1.5 2.0 = 125 °C. (1) T amb = 85 °C. (2) T amb = 25 °C. (3) T amb = −40 °C. (4) T amb Fig 13. ON resistance as a function of input voltage 2 (Ω) = 125 °C. (1) T amb = 85 °C. (2) T amb = 25 °C. (3) T amb = − ...
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... NXP Semiconductors 11. Dynamic characteristics Table 9. Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Symbol Parameter Conditions t propagation delay see enable time Yn; see Yn; see disable time Yn; see dis Yn; see [1] Typical values are measured at T amb ...
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... NXP Semiconductors 11.1 Waveforms and test circuits Measurement points are given in Logic levels: V and V are typical output voltage levels that occur with the output load Fig 16. Input ( output (Z or Yn) propagation delays S, E input output Z, Yn LOW to OFF OFF to LOW output Z, Yn ...
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... NXP Semiconductors Test data is given in Table 11. Definitions test circuit Termination resistance (should be equal to output impedance Load capacitance (including jig and probe capacitance Load resistance External voltage for measuring switching times. EXT Fig 18. Load circuit for switching times Table 11. Test data Supply voltage ...
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... NXP Semiconductors Table 12. Additional dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); T Symbol Parameter α isolation (OFF-state) iso Q charge injection inj 11.3 Test circuits Fig 19. Test circuit for measuring total harmonic distortion Adjust f voltage to obtain 0 dBm level at output. Increase f i Fig 20 ...
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... NXP Semiconductors Ω Adjust f voltage to obtain 0 dBm level at input. i Fig 21. Test circuit for measuring isolation (OFF-state Test circuit b. Input and output pulse definitions = ΔV × inj O L ΔV = output voltage variation generator resistance. gen V = generator voltage. gen Fig 22. Test circuit for measuring charge injection ...
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... NXP Semiconductors 12. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0 pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0.95 0.38 mm 1.1 0.25 0.00 0.75 0.22 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. ...
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... NXP Semiconductors VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2 pin 1 index DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.85 0. 0.12 0.00 0.60 0.17 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1. 8× (2) terminal 1 index area 0 DIMENSIONS (mm are the original dimensions) ( UNIT max max 0.25 2.0 1.05 mm 0.5 0.04 0.17 1.9 0.95 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. ...
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... NXP Semiconductors XSON8: extremely thin small outline package; no leads; 8 terminals; body 1. 0.5 mm terminal 1 index area (2) (4× terminal 1 index area Dimensions (1) Unit max 0.5 0.04 0.20 1.40 1.05 mm nom 0.15 1.35 1.00 min 0.12 1.30 0.95 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. ...
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... NXP Semiconductors XSON8U: plastic extremely thin small outline package; no leads; 8 terminals; UTLP based; body 0.5 mm terminal 1 index area DIMENSIONS (mm are the original dimensions) A UNIT max 0.05 0.35 2.1 3.1 mm 0.5 0.00 0.15 2.9 1.9 OUTLINE VERSION IEC SOT996 Fig 27. Package outline SOT996-2 (XSON8U) ...
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... NXP Semiconductors XQFN8U: plastic extremely thin quad flat package; no leads; 8 terminals; UTLP based; body 1.6 x 1.6 x 0.5 mm terminal 1 index area metal area not for soldering 2 1 terminal 1 index area 8 DIMENSIONS (mm are the original dimensions) A UNIT max 0.05 0.25 1.65 1.65 mm 0.5 ...
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... NXP Semiconductors XSON8: extremely thin small outline package; no leads; 8 terminals; body 1.2 x 1 (2) (8×) terminal 1 index area Dimensions (1) Unit max 0.35 0.04 0.20 1.25 1.05 mm nom 0.15 1.20 1.00 min 0.12 1.15 0.95 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. ...
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... NXP Semiconductors XSON8: extremely thin small outline package; no leads; 8 terminals; body 1.35 x 1 (2) (8×) terminal 1 index area Dimensions (1) Unit max 0.35 0.04 0.20 1.40 1.05 mm nom 0.15 1.35 1.00 min 0.12 1.30 0.95 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. ...
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... NXP Semiconductors 13. Abbreviations Table 13. Abbreviations Acronym Description CMOS Complementary Metal-Oxide Semiconductor TTL Transistor-Transistor Logic HBM Human Body Model ESD ElectroStatic Discharge MM Machine Model CDM Charged Device Model DUT Device Under Test 14. Revision history Table 14. Revision history Document ID Release date 74LVC1G53 v6 20100621 • ...
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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...
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... NXP Semiconductors Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 16. Contact information For more information, please visit: For sales office addresses, please send an email to: 74LVC1G53 Product data sheet 2-channel analog multiplexer/demultiplexer 15 ...
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... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Functional description . . . . . . . . . . . . . . . . . . . 4 8 Limiting values Recommended operating conditions Static characteristics 10.1 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 10.2 ON resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 7 10 ...