74LVC1G3157GM,115 NXP Semiconductors, 74LVC1G3157GM,115 Datasheet

IC MUX/DEMUX 2X1 6XSON

74LVC1G3157GM,115

Manufacturer Part Number
74LVC1G3157GM,115
Description
IC MUX/DEMUX 2X1 6XSON
Manufacturer
NXP Semiconductors
Series
74LVCr
Type
Analog Multiplexerr
Datasheet

Specifications of 74LVC1G3157GM,115

Package / Case
6-XFDFN
Function
Multiplexer/Demultiplexer
Circuit
1 x 2:1
On-state Resistance
15 Ohm
Voltage Supply Source
Single Supply
Voltage - Supply, Single/dual (±)
1.65 V ~ 5.5 V
Current - Supply
0.1µA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Channels
1 Channel
On Resistance (max)
34 Ohm (Typ) @ 1.95 V
On Time (max)
8.7 ns (Typ) @ 1.95 V
Off Time (max)
6 ns (Typ) @ 1.95 V
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.65 V
Maximum Power Dissipation
250 mW
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Number Of Switches
Single
Switch Current (typ)
0.0001 mA @ 3.3 V
Package
6XSON
Maximum On Resistance
195@1.95V Ohm
Maximum Propagation Delay Bus To Bus
3@1.95V@-40C to 125C|2@2.7V@-40C to 125C|1.5@3.6V@-40C to 125C|1@5.5V@-40C to 125C ns
Maximum Low Level Output Current
50 mA
Multiplexer Architecture
2:1
Maximum Turn-off Time
6(Typ)@1.95V ns
Maximum Turn-on Time
8.7(Typ)@1.95V ns
Power Supply Type
Single
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-4399-2
74LVC1G3157GM-G
74LVC1G3157GM-G
935277228115
1. General description
2. Features and benefits
The 74LVC1G3157 provides one analog multiplexer/demultiplexer with one digital select
input (S), two independent inputs/outputs (Y0, Y1) and a common input/output (Z).
Schmitt trigger action at the select input makes the circuit tolerant of slower input rise and
fall times across the entire V
74LVC1G3157
2-channel analog multiplexer/demultiplexer
Rev. 3 — 16 September 2010
Wide supply voltage range from 1.65 V to 5.5 V
Very low ON resistance:
Switch current capability of 32 mA
Break-before-make switching
High noise immunity
CMOS low power consumption
TTL interface compatibility at 3.3 V
Latch-up performance meets requirements of JESD 78 Class I
ESD protection:
Control input accepts voltages up to 5.5 V
Multiple package options
Specified from −40 °C to +85 °C and from −40 °C to +125 °C
7.5 Ω (typical) at V
6.5 Ω (typical) at V
6 Ω (typical) at V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CC
CC
CC
= 5 V
CC
= 2.7 V
= 3.3 V
range from 1.65 V to 5.5 V.
Product data sheet

Related parts for 74LVC1G3157GM,115

74LVC1G3157GM,115 Summary of contents

Page 1

Rev. 3 — 16 September 2010 1. General description The 74LVC1G3157 provides one analog multiplexer/demultiplexer with one digital select input (S), two independent inputs/outputs (Y0, Y1) and a common input/output (Z). Schmitt trigger action at the ...

Page 2

... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name −40 °C to +125 °C 74LVC1G3157GW −40 °C to +125 °C 74LVC1G3157GV −40 °C to +125 °C 74LVC1G3157GM −40 °C to +125 °C 74LVC1G3157GF −40 °C to +125 °C 74LVC1G3157GN −40 °C to +125 °C 74LVC1G3157GS 4 ...

Page 3

... NXP Semiconductors 6. Pinning information 6.1 Pinning 74LVC1G3157 GND 001aac356 Fig 3. Pin configuration SOT363 and SOT457 6.2 Pin description Table 3. Pin description Symbol Pin Y1 1 GND Functional description [1] Table 4. Function table Input [ HIGH voltage level LOW voltage level. 74LVC1G3157 Product data sheet ...

Page 4

... NXP Semiconductors 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage I I input clamping current IK I switch clamping current SK V switch voltage SW I switch current ...

Page 5

... NXP Semiconductors 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground 0 V). Symbol Parameter Conditions V HIGH-level input voltage LOW-level input voltage input leakage pin current 5 OFF-state V = 5.5 V; see S(OFF) ...

Page 6

... NXP Semiconductors 10.1 Test circuits GND and V = GND Fig 6. Test circuit for measuring OFF-state leakage current GND and V = open circuit Fig 7. Test circuit for measuring ON-state leakage current 10.2 ON resistance Table 8. ON resistance At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graphs see ...

Page 7

... NXP Semiconductors Table 8. ON resistance …continued At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graphs see Symbol Parameter R ON resistance (rail) ON(rail resistance ON(flat) (flatness) [1] Typical values are measured at T [2] Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical V temperature ...

Page 8

... NXP Semiconductors 10.3 ON resistance test circuit and graphs GND Fig 8. Test circuit for measuring ON resistance (Ω (4) (3) (2) ( 0.4 0.8 = 125 °C. (1) T amb = 85 °C. (2) T amb = 25 °C. (3) T amb = −40 °C. (4) T amb Fig 10. ON resistance as a function of input voltage 1.8 V ...

Page 9

... NXP Semiconductors (Ω) 11 (1) 9 (2) ( 0.5 1.0 1.5 = 125 °C. (1) T amb = 85 °C. (2) T amb = 25 °C. (3) T amb = −40 °C. (4) T amb Fig 12. ON resistance as a function of input voltage 2 125 °C. (1) T amb = 85 °C. (2) T amb = 25 °C. (3) T amb = −40 °C. ...

Page 10

... NXP Semiconductors 11. Dynamic characteristics Table 9. Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Symbol Parameter Conditions t propagation delay see pd t enable time S to Yn; see en t disable time S to Yn; see dis t break-before-make see b-m time ...

Page 11

... NXP Semiconductors 11.1 Waveforms and test circuits Measurement points are given in Logic levels: V and Fig 15. Input ( output (Z or Yn) propagation delays Yn LOW to OFF OFF to LOW Yn HIGH to OFF OFF to HIGH Measurement points are given in Logic levels: V and Fig 16. Enable and disable times Table 10. ...

Page 12

... NXP Semiconductors a. Test circuit b. Input and output measurement points Fig 17. Test circuit for measuring break-before-make timing Test data is given in Table Definitions test circuit Termination resistance should be equal to output impedance Load capacitance including jig and probe capacitance Load resistance External voltage for measuring switching times. ...

Page 13

... NXP Semiconductors Table 11. Test data Supply voltage Input 11.2 Additional dynamic characteristics Table 12. Additional dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); T Symbol Parameter THD total harmonic distortion −3 dB frequency response f (-3dB) α isolation (OFF-state) ...

Page 14

... NXP Semiconductors 11.3 Test circuits Fig 19. Test circuit for measuring total harmonic distortion Adjust f voltage to obtain 0 dBm level at output. Increase f i Fig 20. Test circuit for measuring the frequency response when switch is in ON-state Adjust f voltage to obtain 0 dBm level at input. i Fig 21. Test circuit for measuring isolation (OFF-state) ...

Page 15

... NXP Semiconductors a. Test circuit b. Input and output pulse definitions = ΔV × inj O L ΔV = output voltage variation generator resistance. gen V = generator voltage. gen Fig 22. Test circuit for measuring charge injection 74LVC1G3157 Product data sheet GND logic (S) off on input V O All information provided in this document is subject to legal disclaimers. ...

Page 16

... NXP Semiconductors 12. Package outline Plastic surface-mounted package; 6 leads y 6 pin 1 index DIMENSIONS (mm are the original dimensions UNIT max 1.1 0.30 0.25 mm 0.1 0.8 0.20 0.10 OUTLINE VERSION IEC SOT363 Fig 23. Package outline SOT363 (SC-88) 74LVC1G3157 Product data sheet scale 2.2 1.35 2 ...

Page 17

... NXP Semiconductors Plastic surface-mounted package (TSOP6); 6 leads pin 1 index 1 e DIMENSIONS (mm are the original dimensions) UNIT 0.1 0.40 1.1 0.26 mm 0.013 0.9 0.25 0.10 OUTLINE VERSION IEC SOT457 Fig 24. Package outline SOT457 (SC-74) 74LVC1G3157 Product data sheet scale 3.1 1.7 3.0 ...

Page 18

... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1. 6× (2) terminal 1 index area DIMENSIONS (mm are the original dimensions) ( UNIT b D max max 0.25 1.5 mm 0.5 0.04 0.17 1.4 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. ...

Page 19

... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 0 6× (1) terminal 1 index area DIMENSIONS (mm are the original dimensions UNIT b D max max 0.20 1.05 mm 0.5 0.04 0.12 0.95 Note 1. Can be visible in some manufacturing processes. OUTLINE VERSION IEC SOT891 Fig 26 ...

Page 20

... NXP Semiconductors XSON6: extremely thin small outline package; no leads; 6 terminals; body 0.9 x 1 (6×) terminal 1 index area Dimensions (1) Unit max 0.35 0.04 0.20 0.95 mm nom 0.15 0.90 min 0.12 0.85 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. ...

Page 21

... NXP Semiconductors XSON6: extremely thin small outline package; no leads; 6 terminals; body 1.0 x 1 (6×) terminal 1 index area Dimensions (1) Unit max 0.35 0.04 0.20 1.05 mm nom 0.15 1.00 min 0.12 0.95 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. ...

Page 22

... NXP Semiconductors 13. Abbreviations Table 13. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor TTL Transistor-Transistor Logic HBM Human Body Model ESD ElectroStatic Discharge MM Machine Model DUT Device Under Test 14. Revision history Table 14. Revision history Document ID Release date 74LVC1G3157 v.3 20100916 • Modifications: Table • ...

Page 23

... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...

Page 24

... NXP Semiconductors Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 16. Contact information For more information, please visit: For sales office addresses, please send an email to: 74LVC1G3157 Product data sheet 15 ...

Page 25

... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics 10.1 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 10.2 ON resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 6 10 ...

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