BLKD815EPFVU Intel, BLKD815EPFVU Datasheet - Page 30

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BLKD815EPFVU

Manufacturer Part Number
BLKD815EPFVU
Description
Manufacturer
Intel
Datasheet

Specifications of BLKD815EPFVU

Lead Free Status / Rohs Status
Supplier Unconfirmed
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
1.8.2 Intel
30
The Intel 815EP chipset consists of the following devices:
The MCH is a centralized controller for the system bus, the memory bus, the AGP bus, and the
AHA bus. The ICH2 is a centralized controller for the board’s I/O paths. The FWH provides the
nonvolatile storage of the BIOS.
The Intel 815EP chipset provides the interfaces shown in Figure 7.
For information about
The Intel 815EP chipset
The resources used by the chipset
The chipset’s compliance with ACPI, APM, and AC ’97
82815EP Memory Controller Hub (MCH) with Accelerated Hub Architecture (AHA) bus
82801BA I/O Controller Hub (ICH2) with AHA bus
Firmware Hub (FWH) (STM M50FW040 or equivalent)
SDRAM Bus
®
Digital Video
815EP Chipset
Output
Memory Controller
System Bus
Graphics and
Hub (GMCH)
82815
Interface
Display
Figure 7. Intel 815EP Chipset Block Diagram
AGP
Bus
ATA-66/100
815E Chipset
AHA
Bus
SMBus
I/O Controller Hub
82801BA
(ICH2)
PCI Bus
Refer to
http://developer.intel.com/design/chipsets/815ep
Chapter 2
Table 4, page 19
Network
AC Link
LPC Bus
USB
(STM M50FW040
Firmware Hub
or equivalent)
(FWH)
OM11887