JSH-42L3AD3-20 JDS UNIPHASE, JSH-42L3AD3-20 Datasheet - Page 39

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JSH-42L3AD3-20

Manufacturer Part Number
JSH-42L3AD3-20
Description
Manufacturer
JDS UNIPHASE
Datasheet

Specifications of JSH-42L3AD3-20

Number Of Receivers
1
Operating Supply Voltage (typ)
3.3V
Operating Temperature Classification
Commercial
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Operating Temperature (max)
85C
Lead Free Status / Rohs Status
Compliant
October 2008
Address
1. The alarm/warning interrupt enable bits are writable by the host to either 0b0 or 0b1. Their default value after a reset is 0b0. To
2. The alarm/warning latch bits are only set to 0b1 by the transceiver, but can be cleared to 0b0 by the host writing a 0b1 to the appro-
Byte
enable multiple bits, the host must write the byte at the appropriate offset with a value that is an OR of all bits that are to be set to
the interrupt enabled state.
priate bit position. Only those bits that are written to 0b1 will be cleared. Upon clearing a bit, the transceiver will re-process the
Latch bit, and if the corresponding alarm/warning bit is still active, and the corresponding interrupt enable bit is still set to 0b1, the
Latch bit will remain set to 0b1, thus causing TX_FAULT to remain active.
Bit
Name
JSH-42L3AD3-20S / 64P0682
JDSU Product Specification 21121822-001
Description of Fields
LW 4x/2x/1x FC SFP with DDM
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