IDT74GTLP16612PA IDT, Integrated Device Technology Inc, IDT74GTLP16612PA Datasheet - Page 3

IDT74GTLP16612PA

Manufacturer Part Number
IDT74GTLP16612PA
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT74GTLP16612PA

Logic Family
GTLP
Operating Supply Voltage (typ)
3.3/5V
Propagation Delay Time
8.7ns
Number Of Elements
1
Number Of Channels
18
Input Logic Level
LVTTL/TTL
Output Logic Level
GTLP
Output Type
3-State/Open Drain
Package Type
TSSOP
Polarity
Non-Inverting
Logical Function
Universal Bus Transceiver with Voltage Translation
Operating Supply Voltage (min)
3.135/4.75V
Operating Supply Voltage (max)
5.25V
Quiescent Current (typ)
30mA
Technology
CMOS
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
56
Lead Free Status / Rohs Status
Not Compliant
RECOMMENDED OPERATING
CONDITIONS
FUNCTION TABLE
NOTES:
1. H = HIGH Voltage Level
2. A-to-B data flow is shown. B-to-A data flow is similar, but uses OEBA, LEBA, CLKBA, and CEBA.
3. Output level before the indicated steady-state input conditions were established, provided that CLKAB was HIGH before LEAB went LOW.
4. Output level before the indicated steady-state input conditions were established.
NOTE:
1. Unused inputs without Bus-Hold must be held HIGH or LOW.
IDT74GTLP16612
CMOS 18-BIT TTL/GTLP UNIVERSAL BUS TRANSCEIVER
Symbol
V
V
L = LOW Voltage Level
X = Don’t Care
↑ = LOW-to-HIGH Transition
V
I
I
I
CCQ
V
T
OH
OL
OL
CC
TT
A
I
CEAB
H
X
L
L
X
X
L
L
Supply Voltage
Bus Termination Voltage
Input Voltage on A-Port and Control Pins
HIGH Level Output Current (A-Port)
LOW Level Output Current (A-Port)
LOW Level Output Current (B-Port)
Operating Temperature
(1)
Rating
OEAB
H
L
L
L
L
L
L
L
(1,2)
Recommended
Inputs
LEAB
3.15 to 3.45
4.75 to 5.25
1.35 to 1.65
H
H
X
–40 to +85
L
L
L
L
L
0 to 5.5
+32
+34
-32
Unit
mA
mA
mA
° C
V
V
V
CLKAB
H
3
X
X
X
X
L
FUNCTIONAL DESCRIPTION:
to GTLP translation. The A-Port and control pins operate at LVTTL or 5V
TTL levels while the B-Port operates at GTLP levels. The transceiver logic
includes D-type latches and D-type flip-flops to allow data flow in transparent,
latched, and clock mode.
The GTLP16612 combines a universal transceiver function with a TTL
Ax
H
H
X
X
X
X
L
L
INDUSTRIAL TEMPERATURE RANGE
Outputs
B
B
B
Bx
H
H
0
0
0
Z
L
L
(3)
(4)
(4)
Clocked storage
Clock Inhibit
Transparent
of A data
of A data
Latched
storage
Mode

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