AM28F256-150PC AMD (ADVANCED MICRO DEVICES), AM28F256-150PC Datasheet
AM28F256-150PC
Specifications of AM28F256-150PC
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AM28F256-150PC Summary of contents
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... TSOP 10,000 write/erase cycles minimum Write and erase voltage 12 GENERAL DESCRIPTION The Am28F256 is a 256 K Flash memory organized as 32 Kbytes of 8 bits each. AMD’s Flash memories offer the most cost-effective and reliable read/write non- volatile random access memory. The Am28F256 is packaged in 32-pin PDIP , PLCC, and TSOP versions ...
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... For system design simplification, the Am28F256 is designed to support either WE controlled writes. During a system write cycle, ad- dresses are latched on the falling edge of WE whichever occurs last. Data is latched on the rising edge ...
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... NC A12 A14 A13 A11 OE# (G A10 10 23 CE# (E DQ7 12 21 DQ0 DQ6 13 20 DQ1 DQ5 14 19 DQ2 DQ4 15 18 DQ3 Note: Pin 1 is marked for orientation DQ0 11560F-2 Am28F256 PLCC A14 29 6 A13 A11 25 10 OE# (G A10 CE# (E#) 13 DQ7 11560F-3 3 ...
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... CONNECTION DIAGRAMS (continued) A11 A13 5 A14 A12 OE# 1 A10 2 CE LOGIC SYMBOL 4 32-Pin TSOP—Standard Pinout 32-Pin TSOP—Reverse Pinout 15 A0–A14 DQ0 –DQ7 CE# (E#) OE# (G#) WE# (W#) 11560F-5 Am28F256 32 OE# 31 A10 30 CE A11 A13 28 A14 WE A12 11560G-4 8 ...
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... J DEVICE NUMBER/DESCRIPTION Am28F256 256 Kilobit ( 8-Bit) CMOS Flash Memory Valid Combinations AM28F256-70 PC, PI, PE, AM28F256-90 AM28F256-120 EC, EI, EE, AM28F256-150 AM28F256-200 C B OPTIONAL PROCESSING Blank = Standard Processing B = Burn-In Contact an AMD representative for more information. TEMPERATURE RANGE C = Commercial (0°C to +70° Industrial (–40°C to +85° Extended (– ...
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... Write Enable active low input controls the write function of the command register to the memory array. The target address is latched on the falling edge of the Write Enable pulse and the appropriate data is latched on the rising edge of the pulse. Write Enable high inhibits writing to the device. Am28F256 5% or 10%) must be at high voltage in ...
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... The device also incorporates several features to pre- vent inadvertent write cycles resulting from V up and power-down transitions or system noise. Low V Write Inhibit CC To avoid initiation of a write cycle during V and power-down, the device locks out write cycles for Am28F256 power- CC power- ...
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... V. See DC Characteristics for voltage levels IL IH PPL 2 memory contents can be read but not written or erased. PP PPL (standby and V should not exceed 10.0 volts. Also, the Am28F256 has Am28F256 . To initiate a write cycle CE# and IH will not accept commands on the rising WE (W#) (Note PPL X ...
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... V code. For the device these two bytes are given in Table 2 below. All identifiers for manufacturer and device codes will exhibit odd parity with the MSB (DQ7) de- fined as the parity bit. Table 2. Am28F256 Auto Select Code Am28F256 (11 13 address A9. Two ID from ...
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... In order to write, OE# must and CE# and WE# IH must any pin is not in the correct state a write IL command will not be executed. Table 3. Am28F256 Command Definitions Command (Note 4) Read Memory Read Auto select Erase Set-up/Erase Write Erase-Verify Program Setup/Program Program-Verify ...
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... Program Setup) to the command register. Figure 1 and Table 4, the Flasherase electrical erase algorithm, illustrate how commands and bus operations are combined to per- form electrical erasure. Refer to AC Erase Characteris- tics and Waveforms for specific timing parameters. Am28F256 11 ...
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... Write Erase Setup Command Write Erase Command Time out 10 ms Write Erase Verify Time out 6 µs Read Data from Device No Increment Data = FFh PLSCNT Yes No Last Address Yes Write Reset Command Apply V PPL Erasure Completed Flasherase Electrical Erase Algorithm Am28F256 Increment Address 11559G-6 ...
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... Data = FFh, reset the register for read operations Wait for V PP parameters. The V power supply can be hard-wired to the device may be ground, no connect with a resistor tied to ground, or less than V PPL Am28F256 pin. Figure 1 illustrates the electrical PP Comments Ramp to V (Note 1) PPH ) WHWH2 ...
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... This command terminates the erase oper- ation on the rising edge of the WE# pulse (section D). The Erase-verify command also stages the device for data verification (section F). After each erase operation each byte must be verified. The byte address to be verified must be supplied with Am28F256 Data Out ...
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... Most bytes verify after the first or second pulse. The entire sequence of pro- gramming and byte verification is performed with high voltage applied to the V PP lustrate the programming algorithm. Am28F256 pin. Figure 3 and Table 5 il- 15 ...
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... Write Program Command (A/D) Time out 10 µs Write Program Verify Command Time out 6 µs Read Data from Device No Verify Byte Increment PLSCNT Yes No Last Address Yes Write Reset Command Apply V PPL Programming Completed Flashrite Programming Algorithm Am28F256 No PLSCNT = 25? Yes Apply V PPL Device Failed 11559G-8 ...
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... Compare Data Output to Data Expected Data = FFh, resets the register for read operations. Wait for V PP parameters. The V power supply can be hard-wired to the device may be ground, no connect with a resistor tied to ground, or less than V PPL Am28F256 Comments Ramp to V (Note 1) PPH ) WHWH1 Ramp to V (Note 1) PPL ...
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... This command terminates the programming op- eration on the rising edge of the WE# pulse (section D). The program-verify command also stages the device for data verification (section F). Another software timing routine (6 µs duration) must be executed to allow for Am28F256 Data Out ...
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... Programming In-System Flash memories can be programmed in-system standard PROM programmer. The device may be sol- dered to the circuit board upon receipt of shipment and programmed in-system. Alternatively, the device may initially be programmed in a PROM programmer prior to soldering the device to the board. Am28F256 CC and ...
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... The operation is initiated by writing 80h or 90h into the command register. Following this command, a read cycle address 0000h retrieves the manufacturer code of 01h. A read cycle from address 0001h returns the device code. To terminate the operation necessary to write another valid command, such as Reset (FFh), into the register. Am28F256 ...
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... V to +5. Voltages PP Read . . . . . . . . . . . . . . . . . . . . . . . . –0 +12.6 V Program, Erase, and Verify . . . . . . +11 +12.6 V Operating ranges define those limits between which the functionality of the device is guaranteed. to –2.0 V for SS + 2.0V for periods up pins is –0 may overshoot PP Am28F256 ). . . . . . . . . . . . + .– + .– +125 ...
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... MAXIMUM OVERSHOOT Maximum Negative Input Overshoot +0.8 V –0.5 V –2.0 V Maximum Positive Input Overshoot 2.0 V Maximum V Overshoot PP 14 Am28F256 11560F-10 11560F-11 11560F-12 ...
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... PP V PPH Operations V Low V Lock-out Voltage LKO CC Notes: 1. Caution: The Am28F256 must not be removed from (or inserted into) a socket when V the voltage difference between V PP time specification of 500 ns minimum tested with simulate open outputs. CC1 IH 3. Maximum active power usage is the sum ...
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... PP V PPH Operations V Low V Lock-out Voltage LKO CC Notes: 1. Caution: The Am28F256 must not be removed from (or inserted into) a socket when V the voltage difference between V PP time specification of 500 ns minimum tested with simulate open outputs. CC1 IH 3. Maximum active power usage is the sum ...
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... I Active Figure 5. Am28F256—Average I TEST CONDITIONS Device Under Test C L 6.2 k Note: Diodes are IN3064 or equivalent Figure 6. Test Setup Frequency in MHz Active vs. Frequency 5.5 V, Addressing Pattern = Minmax CC Data Pattern = Checkerboard 5.0 V Test Condition Output Load 2.7 k Output Load Capacitance, C (including jig capacitance) ...
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... V for a logic “0”. Input pulse rise and fall times are 10 ns. -70 Min 70 Max 70 Max 70 Max 35 Min 0 Max 20 Min 0 Max 20 Min 0 Min 6 Min 50 Am28F256 Test Points Input Output 11560G-15 Am28F256 Speed Options -90 -120 -150 -200 90 120 150 200 90 120 150 200 90 120 150 200 ...
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... Write-Enable times should be measured relative to the Chip-Enable waveform. 4. Not 100% tested. -70 Min 70 Min 0 Min 45 Min 45 Min 10 Min 6 Min 0 Min 0 Min 0 Min 45 Min 20 Min 10 Min 9.5 Min 100 Min 50 Min 500 (Note 4) Min 500 (Note 4) Min 100 Am28F256 Am28F256 Speed Options -90 -120 -150 -200 90 120 150 200 ...
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... Does Not Apply Center Line is High Impedance State (High Z) Device and Data Outputs Valid Enabled Addresses Stable AVAV RC t WHGL GLQV ELQV AXQX GLQX OLZ ELQX LZ Output Valid AVQV ACC Am28F256 OUTPUTS Changing, State Unknown Standby, Power-Down t EHQZ ( GHQZ ( High Z 11560G-16 ...
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... PP V PPL Figure 8. AC Waveforms for Erase Operations Erase Erase-Verify Command Erasure Command AVWL WHEH CH t WHWH2 GHWL OES WHWL WPH WHDX DH DATA IN DATA IN = 20h = 20h Am28F256 Erase Standby, Verification Power-down AVAV WLAX EHQZ DF t WHGL GHQZ GLQV GLQX OLZ AXQX ...
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... Figure 9. 30 Program Command Latch Address Verify Programming and Data Command WLAX WHEH CH t WHWH1 (t ) GHWL OES WHWL WPH WHDX DH DATA IN AC Waveforms for Programming Operations Am28F256 Programming Standby, Verification Power-down AVAV GHQZ DF t WHGL GHQZ GLQV GLQX OLZ AXQX OH VALID ...
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... Excludes 00h programming prior to erasure 0.5 3 sec Excludes system-level overhead Cycles PP = 5.0 V, one pin at a time. CC Test Conditions OUT 25° 1.0 MHz. A Test Conditions 150 C 125 C Am28F256 Comments Min Max ) –1.0 V 13.5 V –1 1 –100 mA +100 mA Typ Max Unit Min Unit ...
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... SEATING PLANE .015 .016 .060 .022 .009 .015 .125 .140 .080 .095 SEATING PLANE .013 .021 .050 REF. Am28F256 .600 .625 .009 .015 .630 .700 0 10 16-038-S_AG PD 032 EC75 5-28-97 lv .042 .056 .400 REF. .490 .530 16-038FPO-5 PL 032 ...
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... PHYSICAL DIMENSIONS TS032—32-Pin Standard Thin Small Outline Package (measured in millimeters) Pin 1 I.D. 1 1.20 MAX 18.30 18.50 19.80 20. Am28F256 0.95 1.05 7.90 8.10 0.50 B 0.05 0.15 0.08 16-038-TSOP-2 0.20 TS 032 DA95 0.10 3-25-97 lv 0.21 0.50 0.70 33 ...
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... PHYSICAL DIMENSIONS TSR032—32-Pin Reversed Thin Small Outline Package (measured in millimeters) Pin 1 I.D. 1 1.20 MAX 34 18.30 18.50 19.80 20. 0.50 0.70 Am28F256 0.95 1.05 7.90 8.10 0.50 BSC 0.05 0.15 16-038-TSOP-2 0.08 TSR032 0.20 DA95 0.10 3-25-97 lv 0.21 ...
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... Product names used in this publication are for identification purposes only and may be trademarks of their respective companies. Revision G+2 Programming In A PROM Programmer: Deleted the paragraph “(Refer to the AUTO SELECT paragraph in the ERASE, PROGRAM, and READ MODE section for programming the Flash memory de- vice in-system).” Am28F256 35 ...