HEF4104BT NXP Semiconductors, HEF4104BT Datasheet
HEF4104BT
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HEF4104BT Summary of contents
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HEF4104B Quad low-to-high voltage translator with 3-state outputs Rev. 07 — 16 December 2009 1. General description The HEF4104B is a quad low voltage-to-high voltage translator with 3-state outputs. It provides the capability of interfacing low voltage circuits to high ...
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... NXP Semiconductors 4. Ordering information Table 1. Ordering information − ° All types operate from +85 Type number Package Name Description HEF4104BP DIP16 plastic dual in-line package; 16 leads (300 mil) HEF4104BT SO16 plastic small outline package; 16 leads; body width 3 Functional diagram V V DD(A) DD( LEVEL ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 3. Pin configuration 6.2 Pin description Table 2. Pin description Symbol Pin V 1 DD DD(A) 7. Functional description [1] Table 3. Function table Control [ HIGH voltage level LOW voltage level high-impedance OFF-state. HEF4104B_7 Product data sheet Quad low-to-high voltage translator with 3-state outputs ...
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... NXP Semiconductors 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to V Symbol Parameter V supply voltage A DD(A) V supply voltage B DD(B) I input clamping current IK V input voltage I I output clamping current OK I input/output current ...
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... NXP Semiconductors 10. Static characteristics Table 6. Static characteristics DD(A) DD( Symbol Parameter Conditions |I V HIGH-level IH input voltage |I V LOW-level IL input voltage |I V HIGH-level OH output voltage |I V LOW-level OL output voltage I HIGH-level V OH output current LOW-level V OL output current input leakage current I I supply current ...
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... NXP Semiconductors V DD(B) The shaded area shows the permissible operating range. Fig function of V DD(B) 11. Dynamic characteristics Table 7. Dynamic characteristics ° for test circuit see Figure amb Symbol Parameter Conditions t HIGH to LOW An to Bn, Bn; see PHL propagation delay LOW to HIGH An to Bn, Bn; see ...
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... NXP Semiconductors Table 7. Dynamic characteristics ° for test circuit see Figure amb Symbol Parameter Conditions t LOW to OFF-state OE to Bn, Bn; see PLZ propagation delay OFF-state to HIGH OE to Bn, Bn; see PZH propagation delay OFF-state to LOW OE to Bn, Bn; see PZL propagation delay [1] Typical value of the propagation delay and output transition time can be calculated with the extrapolation formula (C Table 8 ...
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... NXP Semiconductors 12. Waveforms Measurement points are given in Logic levels: V and V are typical output voltage levels that occur with the output load Fig 5. Data input (An) to data output (Bn, Bn) propagation delays and output transition times OE input output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH ...
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... NXP Semiconductors negative positive a. Input waveforms b. Test circuit Test data given in Table 10. Definitions for test circuit: DUT = Device Under Test load capacitance including jig and probe capacitance load resistance termination resistance should be equal to the output impedance Z T Fig 7. Test circuit for measuring switching times Table 10 ...
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... NXP Semiconductors 13. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT b max. min. max. 1.73 mm 4.2 0.51 3.2 1.30 0.068 inches 0.17 0.02 0.13 0.051 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...
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... NXP Semiconductors SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors 14. Revision history Table 11. Revision history Document ID Release date HEF4104B_7 20091216 • Modifications: Section 12 “Waveforms” Figure 7 “Test circuit for measuring switching times” HEF4104B_6 20091102 HEF4104B_5 20090728 HEF4104B_4 20090305 HEF4104B_CNV_3 19950101 HEF4104B_CNV_2 19950101 HEF4104B_7 Product data sheet Quad low-to-high voltage translator with 3-state outputs ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 14 Revision history ...