LH28F640BFHE-PBTLHGA Sharp Electronics, LH28F640BFHE-PBTLHGA Datasheet - Page 22

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LH28F640BFHE-PBTLHGA

Manufacturer Part Number
LH28F640BFHE-PBTLHGA
Description
Manufacturer
Sharp Electronics
Datasheet

Specifications of LH28F640BFHE-PBTLHGA

Lead Free Status / Rohs Status
Supplier Unconfirmed
NOTES:
1. All currents are in RMS unless otherwise noted. Typical values are the reference values at V
2. I
3. Block erase, full chip erase, (page buffer) program and OTP program are inhibited when V
4. The Automatic Power Savings (APS) feature automatically places the device in power save mode after read cycle
5. Sampled, not 100% tested.
6. The operating current in dual work is the sum of the operating current (read, erase, program) in each plane.
7. For all pins other than those shown in test conditions, input level is V
8. Includes RY/BY#.
V
V
V
V
V
Symbol
IL
IH
OL
OH
LKO
unless V
erase suspend mode, the device’s current draw is the sum of I
buffer) program suspend mode, the device’s current draw is the sum of I
outside the specified voltage.
completion. Standard address access timings (t
CCWS
and I
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
V
CC
CC
is specified.
CCES
Lockout Voltage
are specified with the device de-selected. If read or (page buffer) program is executed while in block
Parameter
DC Characteristics (Continued)
AVQV
Notes
V
5,8
) provide new data when addresses are changed.
LHF64FHG
5
5
5
3
CC
=2.7V-3.6V
Min.
V
-0.4
-0.2
2.4
1.5
CCES
CC
and I
CC
Typ.
CCWS
or GND.
CCR
or I
and I
Max.
+ 0.4
V
0.4
0.2
CC
CCW
CCR
. If read is executed while in (page
.
Unit
V
V
V
V
V
CC
≤V
CC
V
I
V
I
LKO
OL
OH
CC
CC
=3.0V and T
=100µA
=-100µA
Test Conditions
=V
=V
, and not guaranteed
CC
CC
Min.,
Min.,
Rev. 2.45
A
=+25°C
20

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