ICS9248AG-92 IDT, Integrated Device Technology Inc, ICS9248AG-92 Datasheet
ICS9248AG-92
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ICS9248AG-92 Summary of contents
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TM Mobile Pentium II Recommended Application: The ICS9248- fully compliant timing solution for the Intel mobile 440BX/MX chipset requirements. General Description: Features include two strong CPU, seven PCI and eight SDRAM clocks. Three reference outputs are available equal ...
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ICS9248-92 Mobile Pentium II TM System Clock Chip Pin Description Power Groups VDDCOR = Supply for PLL core VDDREF = REF [0:2], X1, X2 VDDPCI = PCICLK_F, PCICLK [0:5] VDDSDR = SDRAM [0:7] VDD48 = 48/24MHzA, 48/24MHz VDDLCPU = CPUCLK ...
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ICS9248-92 Mobile Pentium II TM System Clock Chip Power On Conditions Example MODE = 1, pins 26 and 27 are configured as SDRAM7 and SDRAM6 respectively MODE = 0, pins 26 and 27 are configured as ...
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ICS9248-92 Mobile Pentium II TM System Clock Chip General I The information in this section assumes familiarity with I For more information, contact IDT for an I How to Write: • Controller (host) sends a start bit. • Controller (host) ...
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ICS9248-92 Mobile Pentium II TM System Clock Chip Serial Configuration Command Bitmaps Byte 0: Functional and Frequency Select Clock Register (default on Bits Note: PWD = Power-Up Default Select Functions Notes: 1. ...
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ICS9248-92 Mobile Pentium II TM System Clock Chip TM TM IDT Mobile Pentium II System Clock Chip 6 309—01/25/10 ...
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ICS9248-92 Mobile Pentium II TM System Clock Chip Power Management Clock Enable Configuration Full clock cycle timing is guaranteed at all times after the system has initially powered up except where noted. During power up and power down operations using ...
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ICS9248-92 Mobile Pentium II TM System Clock Chip CPU_STOP# Timing Diagram CPUSTOP asychronous input to the clock synthesizer used to turn off the CPUCLKs for low power operation. CPU_STOP# is synchronized by the ICS9248-92. The minimum ...
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ICS9248-92 Mobile Pentium II TM System Clock Chip PCI_STOP# Timing Diagram PCI_STOP asynchronous input to the ICS9248-92 used to turn off the PCICLK (0:5) clocks for low power operation. PCI_STOP# is synchronized by the ICS9248-92 internally. ...
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ICS9248-92 Mobile Pentium II TM System Clock Chip PD# Timing Diagram The power down selection is used to put the part into a very low power state without turning off the power to the part. PD asynchronous active ...
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ICS9248-92 Mobile Pentium II TM System Clock Chip IDT TM Mobile Pentium II TM System Clock Chip 11 309—01/25/10 ...
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ICS9248-92 Mobile Pentium II TM System Clock Chip IDT TM Mobile Pentium II TM System Clock Chip 12 309—01/25/10 ...
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ICS9248-92 Mobile Pentium II TM System Clock Chip IDT TM Mobile Pentium II TM System Clock Chip 13 309—01/25/10 ...
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ICS9248-92 Mobile Pentium II TM System Clock Chip General Layout Precautions: 1) Use a ground plane on the top routing layer of the PCB in all areas not used by traces. 2) Make all power traces and ground traces as ...
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ICS9248-92 Mobile Pentium II TM System Clock Chip INDEX INDEX AREA AREA aaa Ordering Information 9248yG-92GLFT Example: XXXX IDT Mobile Pentium ...
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ICS9248-92 Mobile Pentium II TM System Clock Chip Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United ...