74LVC16244ADGG NXP Semiconductors, 74LVC16244ADGG Datasheet - Page 13
![](/photos/31/55/315584/sot362_sml.jpg)
74LVC16244ADGG
Manufacturer Part Number
74LVC16244ADGG
Description
Manufacturer
NXP Semiconductors
Datasheet
1.74LVC16244ADGG.pdf
(19 pages)
Specifications of 74LVC16244ADGG
Logic Family
LVC
Logical Function
Buffer/Line Driver
Number Of Elements
4
Number Of Channels
16
Number Of Inputs
16
Number Of Outputs
16
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Package Type
TSSOP
Output Type
3-State
Polarity
Non-Inverting
Propagation Delay Time
8ns
High Level Output Current
-24mA
Low Level Output Current
24mA
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.2V
Quiescent Current
80uA
Technology
CMOS
Pin Count
48
Mounting
Surface Mount
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
74LVC16244ADGG
Manufacturer:
NXP
Quantity:
2 270
Part Number:
74LVC16244ADGG
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
74LVC16244ADGGR
Manufacturer:
PHILIPS/飞利浦
Quantity:
20 000
Company:
Part Number:
74LVC16244ADGGRG4
Manufacturer:
NXP
Quantity:
1 700
Company:
Part Number:
74LVC16244ADGGЈ¬118
Manufacturer:
NXP
Quantity:
2 000
NXP Semiconductors
Fig 11. Package outline SOT362-1 (TSSOP48)
74LVC_LVCH16244A_9
Product data sheet
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm
DIMENSIONS (mm are the original dimensions).
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
UNIT
mm
VERSION
OUTLINE
SOT362-1
48
1
Z
max.
y
1.2
A
pin 1 index
0.15
0.05
A
1
1.05
0.85
A
2
IEC
0.25
A
3
e
D
0.28
0.17
b
p
All information provided in this document is subject to legal disclaimers.
MO-153
JEDEC
0.2
0.2
0.1
0.1
c
REFERENCES
12.6
12.4
D
(1)
Rev. 09 — 18 March 2010
0
b
74LVC16244A; 74LVCH16244A
p
E
6.2
6.0
(2)
16-bit buffer/line driver; 5 V input/output tolerant; 3-state
w
JEITA
scale
M
2.5
0.5
25
24
e
H
8.3
7.9
c
E
5 mm
L
A
1
2
A
1
0.8
0.4
L
p
0.50
0.35
Q
H
E
E
PROJECTION
detail X
EUROPEAN
0.25
v
L
L
0.08
p
w
Q
(A )
0.1
© NXP B.V. 2010. All rights reserved.
y
3
ISSUE DATE
A
99-12-27
03-02-19
θ
0.8
0.4
Z
A
X
SOT362-1
v
M
8
0
θ
o
o
13 of 19
A