74LVC16245ADGG NXP Semiconductors, 74LVC16245ADGG Datasheet
74LVC16245ADGG
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74LVC16245ADGG Summary of contents
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... V tolerant; 3-state Rev. 09 — 29 March 2010 1. General description The 74LVC16245A; 74LVCH16245A are 16-bit transceivers featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The device features two output enable (nOE) inputs for easy cascading and two send/receive (nDIR) inputs for direction control ...
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... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Temperature range Package −40 °C to +125 °C 74LVC16245ADL 74LVCH16245ADL −40 °C to +125 °C 74LVC16245ADGG 74LVCH16245ADGG −40 °C to +125 °C 74LVC16245AEV 74LVCH16245AEV −40 °C to +125 °C 74LVC16245ABQ 74LVCH16245ABQ 4. Functional diagram 1DIR 1A0 1A1 ...
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... NXP Semiconductors Fig 2. IEC logic symbol Fig 3. Bus hold circuit 74LVC_LVCH16245A_9 Product data sheet 74LVC16245A; 74LVCH16245A 16-bit bus transceiver with direction pin tolerant; 3-state 1OE G3 1DIR 3EN1[BA] 3EN2[AB] G6 2OE 2DIR 6EN1[BA] 6EN2[AB] 1A0 1 2 1A1 1A2 1A3 1A4 1A5 1A6 1A7 ...
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... NXP Semiconductors 5. Pinning information 5.1 Pinning 74LVC16245A 74LVCH16245A 1DIR 1 1B0 2 1B1 3 GND 4 1B2 5 1B3 1B4 8 1B5 9 GND 10 1B6 11 1B7 12 2B0 13 2B1 14 GND 15 2B2 16 2B3 2B4 19 2B5 20 GND 21 2B6 22 2B7 23 2DIR 24 001aad110 Fig 4. Pin configuration SOT370-1 (SSOP48) and SOT362-1 (TSSOP48) 74LVC_LVCH16245A_9 Product data sheet 74LVC16245A ...
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... NXP Semiconductors terminal 1 index area (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input. Fig 6. Pin configuration SOT1134-1 (HXQFN60U) 74LVC_LVCH16245A_9 Product data sheet 74LVC16245A; 74LVCH16245A 16-bit bus transceiver with direction pin tolerant; 3-state ...
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... NXP Semiconductors 5.2 Pin description Table 2. Pin description Symbol Pin SOT370-1 and SOT362-1 1DIR, 2DIR 1, 24 1B0 to 1B7 11, 12 2B0 to 2B7 13, 14, 16, 17, 19, 20, 22, 23 GND 4, 10, 15, 21, 28, 34, 39 18, 31 1OE, 2OE 48, 25 1A0 to 1A7 47, 46, 44, 43, 41, 40, 38, 37 2A0 to 2A7 36, 35, 33, 32, 30, 29, 27 ...
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... NXP Semiconductors 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC I input clamping current IK V input voltage I I output clamping current OK V output voltage O I output current ...
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... NXP Semiconductors 9. Static characteristics Table 6. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions V HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage input leakage current I OFF-state output current power-off leakage V OFF I current ...
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... NXP Semiconductors Table 6. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions I bus hold HIGH V BHHO CC overdrive current [1] All typical values are measured at V [2] The bus hold circuit is switched off when V [3] For I/O ports the parameter I includes the input leakage current ...
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... NXP Semiconductors Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Symbol Parameter Conditions C power per buffer dissipation capacitance [ the same as t and PLH PHL t is the same as t and PZL PZH t is the same as t and t ...
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... NXP Semiconductors nOE input output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH Measurement points are given in Logic levels: V and Fig 8. 3-state enable and disable times Table 8. Measurement points Supply voltage Input 1 2.7 V 2 3.6 V 2.7 V 74LVC_LVCH16245A_9 Product data sheet 74LVC16245A; 74LVCH16245A 16-bit bus transceiver with direction pin tolerant; 3-state ...
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... NXP Semiconductors Test data is given in Table Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to output impedance External voltage for measuring switching times. EXT Fig 9. Load circuit for measuring switching times Table 9. Test data ...
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... NXP Semiconductors 12. Package outline SSOP48: plastic shrink small outline package; 48 leads; body width 7 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.4 2.35 mm 2.8 0.25 0.2 2.20 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE ...
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... NXP Semiconductors TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6 pin 1 index 1 DIMENSIONS (mm are the original dimensions). A UNIT max. 0.15 1.05 mm 1.2 0.25 0.05 0.85 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors VFBGA56: plastic very thin fine-pitch ball grid array package; 56 balls; body 4 0.65 mm ball A1 index area ball A1 1 index area DIMENSIONS (mm are the original dimensions) A UNIT max. 0.3 0.7 0. 0.2 0.6 0.35 OUTLINE VERSION IEC SOT702-1 Fig 12. Package outline SOT702-1 (VFBGA56) ...
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... NXP Semiconductors HXQFN60U: plastic thermal enhanced extremely thin quad flat package; no leads; 60 terminals; UTLP based; body 0.5 mm terminal 1 index area A10 terminal 1 index area D1 Dimensions Unit max 0.50 0.05 0.35 4.1 mm nom 0.48 0.02 0.30 4.0 min 0.46 0.00 0.25 3.9 ...
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... HXQFN60U (SOT1134-1) package. Product data sheet The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Added type number 74LVC16245ABQ and 74LVCH16245ABQ (HUQFN60U package) ...
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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...
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... NXP Semiconductors 16. Contact information For more information, please visit: For sales office addresses, please send an email to: 74LVC_LVCH16245A_9 Product data sheet 74LVC16245A; 74LVCH16245A 16-bit bus transceiver with direction pin tolerant; 3-state http://www.nxp.com salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. ...
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... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6 6 Functional description . . . . . . . . . . . . . . . . . . . 6 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 9 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13 13 Abbreviations ...