PCK2001DL NXP Semiconductors, PCK2001DL Datasheet - Page 10

• Manufacturer Part Number: PCK2001DL
• Manufacturer: NXP Semiconductors

Specifications of PCK2001DL

• Number Of Outputs: 18
• Operating Supply Voltage (max): 3.465V
• Operating Temp Range: 0C to 70C
• Propagation Delay Time: 5ns
• Operating Supply Voltage (min): 3.135V
• Mounting: Surface Mount
• Pin Count: 48
• Operating Supply Voltage (typ): 3.3V
• Package Type: SSOP
• Quiescent Current: 100uA
• Power Dissipation: 850mW
• Duty Cycle: 55%
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

1. Inactive means outputs are held LOW and are disabled from switching. These outputs are designed to be configured at power-on and are
1. Inactive means outputs are held LOW and are disabled from switching. These outputs are designed to be configured at power-on and are
1. Inactive means outputs are held LOW and are disabled from switching. These outputs are designed to be configured at power-on and are
Philips Semiconductors
SERIAL CONFIGURATION MAP
The serial bits will be read by the clock buffer in the following order:
All unused register bits (Reserved and N/A) should be defined as “Don’t Care”. It is expected that the controller will force all of these bits to a “0”
level.
All register bits labeled “Initialize to 0” must be written to zero during initialization. Failure to do so may result in a higher than normal operating
current. The controller will read back the last written value.
Byte 0: Output active/inactive register
1 = enable; 0 = disable
NOTE:
Byte 1: Output active/inactive register
1 = enable; 0 = disable
NOTE:
Byte 2: Optional register for possible future requirements
NOTE:
2002 Jun 03
14.318–150 MHz I
Byte 0 – Bits 7, 6, 5, 4, 3, 2, 1, 0
Byte 1 – Bits 7, 6, 5, 4, 3, 2, 1, 0
Byte 2 – Bits 7, 6, 5, 4, 3, 2, 1, 0
not expected to be configured during the normal modes of operation.
not expected to be configured during the normal modes of operation.
not expected to be configured during the normal modes of operation.
BIT
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
PIN#
PIN#
PIN#
18
17
14
13
45
44
41
40
36
35
32
31
28
21
—
—
—
—
—
—
9
8
5
4
2
C 1:18 clock buffer
BUF_OUT15
BUF_OUT14
BUF_OUT13
BUF_OUT12
BUF_OUT11
BUF_OUT10
BUF_OUT17
BUF_OUT16
BUF_OUT7
BUF_OUT6
BUF_OUT5
BUF_OUT4
BUF_OUT3
BUF_OUT2
BUF_OUT1
BUF_OUT0
BUF_OUT9
BUF_OUT8
(reserved)
(reserved)
(reserved)
(reserved)
(reserved)
(reserved)
NAME
NAME
NAME
10
DESCRIPTION
DESCRIPTION
DESCRIPTION
Active/Inactive
Active/Inactive
Active/Inactive
Active/Inactive
Active/Inactive
Active/Inactive
Active/Inactive
Active/Inactive
Active/Inactive
Active/Inactive
Active/Inactive
Active/Inactive
Active/Inactive
Active/Inactive
Active/Inactive
Active/Inactive
Active/Inactive
Active/Inactive
(reserved)
(reserved)
(reserved)
(reserved)
(reserved)
(reserved)
PCK2001
Product data