HEF40175BT NXP Semiconductors, HEF40175BT Datasheet - Page 7

HEF40175BT

Manufacturer Part Number
HEF40175BT
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of HEF40175BT

Logic Family
4000
Technology
CMOS
Number Of Bits
4
Number Of Elements
1
Clock-edge Trigger Type
Positive-Edge
Polarity
Invert/Non-Invert
Operating Supply Voltage (typ)
3.3/5/9/12V
Package Type
SO
Propagation Delay Time
160ns
Low Level Output Current
4.2mA
High Level Output Current
-4.2mA
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
15V
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
16
Lead Free Status / Rohs Status
Compliant

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Manufacturer
Quantity
Price
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HEF40175BT
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PANASONIC
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HEF40175BT
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PHI
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NXP Semiconductors
12. Waveforms
HEF40175B
Product data sheet
Fig 5.
Qn output
a. CP and MR to Qn Propagation delays and Qn transition times
b. Minimum pulse widths for CP and MR, MR to CP recovery time, and set-up and hold time for Dn to CP
MR input
CP input
Dn input
V
Set-up and hold times are shown as positive values but may be specified as negative values.
The shaded area are where input changes result in predicable output performance.
Measurement points are given in
Waveforms showing switching times
V
V
0 V
0 V
0 V
OH
OH
OL
V
V
V
I
I
I
and V
OL
are typical output voltage levels that occur with the output load.
10 %
V
V
M
M
MR input
CP input
Dn input
t
PLH
90 %
t
TLH
0 V
0 V
0 V
V
V
V
I
I
I
Table
All information provided in this document is subject to legal disclaimers.
9.
V
t
M
Rev. 6 — 14 December 2010
su
V
M
t
t
h
PHL
t
THL
V
M
1/f
max
t
W
t
W
t
rec
001aae568
t
PHL
HEF40175B
Quad D-type flip-flop
© NXP B.V. 2010. All rights reserved.
001aak039
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