PMWD19UN NXP Semiconductors, PMWD19UN Datasheet
PMWD19UN
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PMWD19UN Summary of contents
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... Rev. 01 — 20 December 2002 M3D647 1. Product profile 1.1 Description Dual N-channel enhancement mode field-effect transistor in a plastic package using TrenchMOS™ technology. Product availability: PMWD19UN in SOT530-1 (TSSOP8). 1.2 Features Surface mounting package Very low threshold 1.3 Applications Portable appliances Battery management 1 ...
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... Dual TrenchMOS™ ultra low level FET Conditions 150 150 4.5 V; Figure 2 and 100 4.5 V; Figure pulsed Figure Figure pulsed Rev. 01 — 20 December 2002 PMWD19UN Min Max Unit - +150 C 55 +150 © Koninklijke Philips Electronics N.V. 2002. All rights reserved ...
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... Product data 03aa17 120 I der (%) 150 200 4 der Fig 2. Normalized continuous drain current as a function of solder point temperature Rev. 01 — 20 December 2002 PMWD19UN Dual TrenchMOS™ ultra low level FET 03aa25 50 100 150 200 ------------------- 100 003aaa358 µ 100 (V) © Koninklijke Philips Electronics N.V. 2002. All rights reserved. ...
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... Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration. 9397 750 10833 Product data Conditions Figure 4 minimum footprint; mounted on printed-circuit board single pulse Rev. 01 — 20 December 2002 PMWD19UN Dual TrenchMOS™ ultra low level FET Min Typ Max - 100 - 003aaa275 ...
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... Dual TrenchMOS™ ultra low level FET Conditions I = 250 mA Figure GS 150 4 3.5 A; Figure 7 and 150 1 3.5 A; Figure 2 3.5 A; Figure Figure MHz; Figure 4 Figure /dt = 100 Rev. 01 — 20 December 2002 PMWD19UN Min Typ Max Unit 0.45 0 100 100 2 6 1478 - pF - 161 - pF - 128 - 0.67 1 ...
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... Fig 6. Transfer characteristics: drain current as a function of gate-source voltage; typical values. 2 003aaa278 a 1.5 1 1.8 V 0 (A) Fig 8. Normalized drain source on-state resistance factor as a function of junction temperature. Rev. 01 — 20 December 2002 PMWD19UN Dual TrenchMOS™ ultra low level FET 003aaa277 T = 150 0.5 1.0 1 DSon 03aa27 0 ...
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... iss 2 C oss C rss ( and 150 Fig 12. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values. Rev. 01 — 20 December 2002 PMWD19UN Dual TrenchMOS™ ultra low level FET 03aj64 min typ 0 0.2 0.4 0 003aaa280 150 0.2 ...
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... Philips Semiconductors Fig 13. Gate-source voltage as a function of gate charge; typical values. 9397 750 10833 Product data ( (nC) Rev. 01 — 20 December 2002 PMWD19UN Dual TrenchMOS™ ultra low level FET 003aaa281 30 © Koninklijke Philips Electronics N.V. 2002. All rights reserved ...
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... 2.5 scale (1) ( 0.30 0.20 3.10 4.50 6.50 0.65 0.19 0.13 2.90 4.30 6.30 REFERENCES JEDEC EIAJ MO-153 Rev. 01 — 20 December 2002 PMWD19UN Dual TrenchMOS™ ultra low level FET detail ( 0.70 0.70 0.94 0.10 0.10 0.10 0.50 0.35 EUROPEAN ISSUE DATE ...
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... Revision history Table 5: Revision history Rev Date CPCN Description 01 20021220 - Product data (9397 750 10833) 9397 750 10833 Product data Dual TrenchMOS™ ultra low level FET Rev. 01 — 20 December 2002 PMWD19UN © Koninklijke Philips Electronics N.V. 2002. All rights reserved ...
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... Trademarks TrenchMOS — Rev. 01 — 20 December 2002 Rev. 01 — 20 December 2002 PMWD19UN PMWD19UN Dual TrenchMOS™ ultra low level FET Dual TrenchMOS™ ultra low level FET is a trademark of Koninklijke Philips Electronics N.V Fax: + 24825 © Koninklijke Philips Electronics N.V. 2002. All rights reserved. ...
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... Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 20 December 2002 Document order number: 9397 750 10833 PMWD19UN Dual TrenchMOS™ ultra low level FET ...