ICS85352AYI IDT, Integrated Device Technology Inc, ICS85352AYI Datasheet - Page 10

• Manufacturer Part Number: ICS85352AYI
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Multiplexerr

Specifications of ICS85352AYI

• Number Of Clock Inputs: 2
• Mode Of Operation: Differential
• Output Frequency: 700MHz
• Output Logic Level: LVPECL
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: TQFP EP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

ICS85352I Data Sheet
Termination for 3.3V LVPECL Outputs
The clock layout topology shown below is a typical termination for
LVPECL outputs. The two different layouts mentioned are
recommended only as guidelines.
The differential outputs are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, terminating
resistors (DC current path to ground) or current sources must be
used for functionality. These outputs are designed to drive 50Ω
Figure 4A. 3.3V LVPECL Output Termination
ICS85352AYI REVISION B JULY 6, 2010
RTT =
((V
3.3V
OH
LVPECL
+ V
OL
) / (V
1
CC
Z
Z
– 2)) – 2
o
o
= 50Ω
= 50Ω
* Z
R1
50Ω
o
RTT
R2
50Ω
V
+
_
CC
3.3V
- 2V
Input
10
transmission lines. Matched impedance techniques should be used
to maximize operating frequency and minimize signal distortion.
Figures 4A and 4B show two different layouts which are
recommended only as guidelines. Other suitable clock layouts may
exist and it would be recommended that the board designers
simulate to guarantee compatibility across all printed circuit and clock
component process variations.
Figure 4B. 3.3V LVPECL Output Termination
3.3V
LVPECL
12 BIT, 2-TO-1, 3.3V, 2.5V LVPECL CLOCK BUFFER
Z
Z
o
o
= 50Ω
= 50Ω
R3
125Ω
©2010 Integrated Device Technology, Inc.
R1
84Ω
3.3V
R4
125Ω
R2
84Ω
+
_
3.3V
Input