ICS8530DY IDT, Integrated Device Technology Inc, ICS8530DY Datasheet - Page 10

• Manufacturer Part Number: ICS8530DY
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of ICS8530DY

• Number Of Outputs: 32
• Operating Supply Voltage (max): 3.465V
• Operating Temp Range: 0C to 70C
• Propagation Delay Time: 2ns
• Operating Supply Voltage (min): 3.135V
• Mounting: Surface Mount
• Pin Count: 48
• Operating Supply Voltage (typ): 3.3V
• Package Type: LQFP
• Duty Cycle: 53%
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Not Compliant

ICS8530 Data Sheet
ICS8530DY REVISION E SEPTEMBER 15, 2010
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS8530.
Equations and example calculations are also provided.
1.
The total power dissipation for the ICS8530 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Total Power_
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and it directly affects the reliability of the device.
The maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the
bond wire and bond pad temperature remains below 125°C.
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 42.1°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 6. Thermal Resistance
Linear Feet per Minute
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
Power Dissipation.
•
•
Power (core)
Power (outputs)
If all outputs are loaded, the total power is 16 * 35mW = 560mW
The equation for Tj is as follows: Tj = θ
Tj = Junction Temperature
θ
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
70°C + 0.958W * 42.1°C/W = 110.3°C. This is below the limit of 125°C.
JA
A
= Ambient Temperature
= Junction-to-Ambient Thermal Resistance
MAX
(3.465V, with all outputs switching) = 398.5mW + 560mW = 958mW
MAX
MAX
= V
= 35mW/Loaded Output pair
CC_MAX
θ
JA
* I
for 48 Lead LQFP, Forced Convection
EE_MAX
CC
= 3.3V + 5% = 3.465V, which gives worst case results.
JA
= 3.465V * 115mA = 398.5mW
* Pd_total + T
θ
JA
A
67.8°C/W
47.9°C/W
by Velocity
10
0
LOW SKEW, 1-TO-16, DIFFERENTIAL-TO-2.5V LVPECL FANOUT BUFFER
55.9°C/W
42.1°C/W
200
JA
must be used. Assuming a moderate air
©2010 Integrated Device Technology, Inc.
50.1°C/W
39.4°C/W
500