ICS853031AY IDT, Integrated Device Technology Inc, ICS853031AY Datasheet - Page 9

• Manufacturer Part Number: ICS853031AY
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Driverr

Specifications of ICS853031AY

• Number Of Clock Inputs: 2
• Mode Of Operation: Differential
• Output Frequency: >1600MHz
• Output Logic Level: ECL/LVPECL
• Operating Supply Voltage (min): -2.375/2.375V
• Operating Supply Voltage (typ): -2.5/-3.3/3.3V
• Operating Supply Voltage (max): -3.465/3.465V
• Package Type: LQFP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / Rohs Status: Not Compliant

IDT
W
Figure 2 shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF ~ V
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The ratio
R
I
CLK/nCLK I
For applications not requiring the use of the differential input,
both CLK and nCLK can be left floating. Though not required, but
for additional protection, a 1k
ground.
PCLK/nPCLK I
For applications not requiring the use of a differential input, both
the PCLK and nPCLK pins can be left floating. Though not
required, but for additional protection, a 1k
from PCLK to ground.
LVCMOS C
All control pins have internal pullups or pulldowns; additional
resistance is not required but can be added for additional
protection. A 1k
NPUTS
ICS853031
LOW SKEW, 1-TO-9, DIFFERENTIAL-TO-2.5, 3.3V LVPECL/ECL FANOUT BUFFER
ECOMMENDATIONS FOR
IRING THE
™
/ ICS
:
™
1-TO-9, 2.5V, 3.3V LVPECL/ECL FANOUT BUFFER
ONTROL
NPUTS
D
NPUTS
IFFERENTIAL
resistor can be used.
P
INS
U
NUSED
I
NPUT TO
resistor can be tied from CLK to
F
IGURE
I
NPUT AND
A
A
2. S
PPLICATION
CCEPT
resistor can be tied
CLK_IN
INGLE
0.1uF
O
S
C1
INGLE
UTPUT
E
NDED
CC
/2 is
E
P
S
NDED
INS
I
IGNAL
NFORMATION
R1
1K
V_REF
R2
1K
9
L
of R1 and R2 might need to be adjusted to position the V_REF in
the center of the input voltage swing. For example, if the input
clock swing is only 2.5V and V
and R2/R1 = 0.609.
O
LVPECL O
All unused LVPECL outputs can be left floating. We recommend
that there is no trace attached. Both sides of the differential output
pair should either be left floating or terminated.
D
EVELS
V
RIVING
UTPUTS
CC
+
-
D
:
IFFERENTIAL
UTPUTS
I
NPUT
ICS853031AY REV. C AUGUST 12, 2008
CC
= 3.3V, V_REF should be 1.25V