ICS8430AY-61 IDT, Integrated Device Technology Inc, ICS8430AY-61 Datasheet - Page 15

ICS8430AY-61

Manufacturer Part Number
ICS8430AY-61
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
PLL Frequency Synthesizerr
Datasheet

Specifications of ICS8430AY-61

Number Of Elements
1
Supply Current
155mA
Pll Input Freq (min)
14MHz
Pll Input Freq (max)
27MHz
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
0C to 70C
Package Type
LQFP
Output Frequency Range
20.83 to 500MHz
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.465V
Operating Temperature Classification
Commercial
Pin Count
32
Lead Free Status / Rohs Status
Not Compliant

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This section provides information on power dissipation and junction temperature for the ICS8430-61.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS8430-61 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for the devices is 125°C.
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 42.1°C/W per Table 8 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
T
8430AY-61
ABLE
The equation for Tj is as follows: Tj = θ
Tj = Junction Temperature
θ
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
70°C + 0.597W * 42.1°C/W = 95°C. This is well below the limit of 125°C.
JA
A
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
= Ambient Temperature
8. T
= Junction-to-Ambient Thermal Resistance
Power (core)
Power (outputs)
If all outputs are loaded, the total power is 2 * 30mW = 60mW
Total Power
HERMAL
R
MAX
ESISTANCE
_MAX
MAX
= V
(3.465V, with all outputs switching) = 537.1mW + 60mW = 597.1mW
= 30mW/Loaded Output pair
CC_MAX
θ θ θ θ θ
* I
JA
EE_MAX
FOR
θ θ θ θ θ
JA
P
CC
32-
= 3.465V * 155mA = 537.1mW
JA
by Velocity (Linear Feet per Minute)
= 3.3V + 5% = 3.465V, which gives worst case results.
* Pd_total + T
OWER
PIN
LQFP, F
C
www.idt.com
500MH
A
ONSIDERATIONS
ORCED
15
C
ONVECTION
Z
67.8°C/W
47.9°C/W
, C
0
RYSTAL
LVPECL F
-
TO
55.9°C/W
42.1°C/W
200
-3.3V, 2.5V D
REQUENCY
JA
must be used. Assuming a
ICS8430-61
50.1°C/W
39.4°C/W
500
S
IFFERENTIAL
YNTHESIZER
REV. D JULY 27, 2010

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