SSTUA32S869BHLF IDT, Integrated Device Technology Inc, SSTUA32S869BHLF Datasheet - Page 13

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SSTUA32S869BHLF

Manufacturer Part Number
SSTUA32S869BHLF
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of SSTUA32S869BHLF

Logic Family
SSTU
Logical Function
Reg Bfr W/ParityTst
Number Of Elements
1
Number Of Bits
14
Number Of Inputs
14
Number Of Outputs
28
High Level Output Current
-8mA
Low Level Output Current
8mA
Package Type
CTBGA
Propagation Delay Time
3ns
Operating Supply Voltage (typ)
1.8V
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Clock-edge Trigger Type
Posit/Negat-Edge
Polarity
Non-Inverting
Technology
CMOS
Frequency (max)
340(Min)MHz
Mounting
Surface Mount
Pin Count
150
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
Notes: 1. C
1173—10/28/05
LVCMOS
RESET#
Note 2)
2. I
3. All input pulses are supplied by generators having the following chareacteristics: PRR ≤10 MHz,
4. The outputs are measured one at a time with one transition per measurement.
5. V
6. V
7. V
8. V
9. t
Inp ut
Inpu t
Inpu t
(see
VOLTAGE WAVEFORMS – SETUP AND HOLD TIMES
Zo=50Ω, input slew rate = 1 V/ns ±20% (unless otherwise specified).
I
PLH
DD
DD
CK
CK
REF
IH
ID
IL
t
L
in act
VOLTAGE WAVEFORMS – PULSE DURATION
incluces probe and jig capacitance.
tested with clock and data inputs held at V
= V
= V
= 600 mV
and t
VOLTAGE AND CURRENT WAVEFORMS
= V
INPUTS ACTIVE AND INACTIVE TIMES
REF
REF
DD
PHL
10%
Figure 6 — Parameter M easurement I nfor mation (V
/2
- 250 mV (ac voltage levels) for differential inputs. V
CK Inputs
+ 250 mV (ac voltage levels) for differential inputs. V
V
DD
are the same as t
/2
V
V
ICR
REF
t
su
R
t
Test Point
Test Point
L
w
= 100Ω
V
ICR
t
t d = 350ps
h
TL
=50Ω
PDM
V
V
V
DD
ICR
REF
.
/2
90%
t
CK#
CK
act
V
V
V
DUT
0 V
V
V
LOAD CIRCUIT
ID
ID
DD
IH
IL
Out
DD
13
or GND, and Io = 0mA.
LVCMOS
TL=350ps, 50Ω
Output
VOLTAGE WAVEFORMS – PROPAGATION DELAY TIMES
Output
VOLTAGE WAVEFORMS – PROPAGATION DELAY TIMES
Input
RST#
CK
CK
t
PLH
C
(see Note 1)
L
= 30 pF
IL
Advance Information
IH
V
= GND for LVCMOS input.
ICR
= V
DD
ICSSSTUA32S869B
V
DD
TT
= 1.8 V ± 0.1 V)
for LVCMOS input.
V
DD
V
/2
DD
R
R
Test Point
L
L
= 1000Ω
= 1000Ω
V
V
TT
ICR
t
RPHL
V
TT
t
PHL
V
V
V
V
V
V
V
ID
IH
IL
OH
OL
OH
OL

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