E28F008SA85 Intel, E28F008SA85 Datasheet - Page 40

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E28F008SA85

Manufacturer Part Number
E28F008SA85
Description
Manufacturer
Intel
Datasheet

Specifications of E28F008SA85

Density
8Mb
Access Time (max)
85ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
20b
Operating Supply Voltage (typ)
5V
Operating Temp Range
0C to 70C
Package Type
TSOP
Program/erase Volt (typ)
11.4 to 12.6V
Sync/async
Asynchronous
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Word Size
8b
Number Of Words
1M
Supply Current
50mA
Mounting
Surface Mount
Pin Count
40
Lead Free Status / Rohs Status
Not Compliant

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28F008SA
9.14
NOTES:
1.
2.
3.
4.
5.
6.
7.
40
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
AVAV
PHEL
WLEL
ELEH
VPEH
AVEH
DVEH
EHDX
EHAX
EHWH
EHEL
EHRL
EHQV
EHQV
EHGL
QVVL
Chip-Enable Controlled Writes: Write operations are driven by the valid combination of CE# and WE#. In systems where
CE# defines the write pulsewidth (within a longer WE# timing waveform), all setup, hold and inactive WE# times should be
measured relative to the CE# waveform.
Sampled, not 100% tested.
Refer to Table 3 for valid A
Refer to Table 3 for valid D
Byte write and block erase durations are measured to completion (SR.7 = 1, RY/BY# = V
until determination of byte write/block erase success (SR.3/4/5 = 0)
See High Speed AC Input/Output Reference Waveforms and High Speed AC Testing Load Circuits for testing
characteristics.
See AC Input/Output Reference Waveforms and AC Testing Load Circuits for testing characteristics.
Symbol
1
2
Alternative CE#-Controlled Writes— Extended Temperature Operation
t
t
t
t
t
t
t
t
t
t
t
t
WC
PS
WS
CP
VPS
AS
DS
DH
AH
WH
EPH
VPH
Write Cycle Time
RP# High Recovery to CE# Going Low
WE# Setup to CE# Going Low
CE# Pulse Width
V
Address Setup to CE# Going High
Data Setup to CE# Going High
Data Hold from CE# High
Address Hold from CE# High
WE# Hold from CE# High
CE# Pulse Width High
CE# High to RY/BY# Going Low
Duration of Byte Write Operation
Duration of Block Erase Operation
Write Recovery before Read
V
PP
PP
Setup to CE# Going High
Hold from Valid SRD, RY/BY# High
Versions
IN
IN
for byte write or block erasure.
for byte write or block erasure.
Parameter
V
CC
Notes
2, 5
±10%
2
2
3
4
5
5
OH
28F008SA-100
Min
100
100
0.3
). V
50
40
40
25
PRELIMINARY
1
0
5
5
0
6
0
0
PP
should be held at V
Max
100
(7)
Unit
sec
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
ns
PPH

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