E28F008SA85 Intel, E28F008SA85 Datasheet - Page 7

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E28F008SA85

Manufacturer Part Number
E28F008SA85
Description
Manufacturer
Intel
Datasheet

Specifications of E28F008SA85

Density
8Mb
Access Time (max)
85ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
20b
Operating Supply Voltage (typ)
5V
Operating Temp Range
0C to 70C
Package Type
TSOP
Program/erase Volt (typ)
11.4 to 12.6V
Sync/async
Asynchronous
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Word Size
8b
Number Of Words
1M
Supply Current
50mA
Mounting
Surface Mount
Pin Count
40
Lead Free Status / Rohs Status
Not Compliant

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A
DQ
CE#
RP#
OE#
WE#
RY/BY#
V
V
GND
PRELIMINARY
Symbol
0
PP
CC
–A
0
–DQ
19
7
INPUT/OUTPUT
OUTPUT
INPUT
INPUT
INPUT
INPUT
INPUT
Type
ADDRESS INPUTS for memory addresses. Addresses are internally
latched during a write cycle.
DATA INPUT/OUTPUTS: Inputs data and commands during CUI
write cycles; outputs data during memory array, status register and
Identifier read cycles. The data pins are active high and float to tri-
state off when the chip is deselected or the outputs are disabled. Data
is internally latched during a write cycle.
CHIP ENABLE: Activates the device’s control logic, input buffers,
decoders, and sense amplifiers. CE# is active low; CE# high
deselects the memory device and reduces power consumption to
standby levels.
RESET/DEEP POWER-DOWN: Puts the device in deep power-down
mode. RP# is active low; RP# high gates normal operation. RP# also
locks out block erase or byte write operations when active low,
providing data protection during power transitions. RP# active resets
internal automation. Exit from deep power-down sets device to read-
array mode.
OUTPUT ENABLE: Gates the device’s outputs through the data
buffers during a read cycle. OE# is active low.
WRITE ENABLE: Controls writes to the CUI and array blocks. WE#
is active low. Addresses and data are latched on the rising edge of
the WE# pulse.
READY/BUSY#: Indicates the status of the internal Write State
Machine. When low, it indicates that the WSM is performing a block
erase or byte write operation. RY/BY# high indicates that the WSM is
ready for new commands, block erase is suspended or the device is
in deep power-down mode. RY/BY# is always active and does NOT
float to tri-state off when the chip is deselected or data outputs are
disabled.
BLOCK ERASE/BYTE WRITE POWER SUPPLY for erasing blocks
of the array or writing bytes of each block.
With V
DEVICE POWER SUPPLY (5 V ±10%, 5 V ±5%)
GROUND
Table 1. Pin Descriptions
PP
< V
PPLMAX
, memory contents cannot be altered.
Name and Function
NOTE:
28F008SA
7

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