ICS8735AM-21 IDT, Integrated Device Technology Inc, ICS8735AM-21 Datasheet - Page 12

• Manufacturer Part Number: ICS8735AM-21
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Zero Delay PLL Clock Generatorr

Specifications of ICS8735AM-21

• Number Of Elements: 1
• Supply Current: 150mA
• Pll Input Freq (min): 31.25MHz
• Pll Input Freq (max): 700MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Package Type: SOIC
• Output Frequency Range: Up to 700MHz
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Commercial
• Pin Count: 20
• Lead Free Status / Rohs Status: Not Compliant

Termination for 3.3V LVPECL Outputs
The clock layout topology shown below is a typical termination for
LVPECL outputs. The two different layouts mentioned are
recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, terminating
resistors (DC current path to ground) or current sources must be
used for functionality. These outputs are designed to drive 50
Figure 4A. 3.3V LVPECL Output Termination
IDT™ / ICS™ 3.3V LVPECL ZERO DELAY CLOCK GENERATOR
ICS8735-21
700MHZ, DIFFERENTIAL-TO-3.3V LVPECL ZERO DELAY CLOCK GENERATOR
RTT =
((V
FOUT
OH
+ V
OL
) / (V
1
CC
Z
Z
– 2)) – 2
o
o
= 50Ω
= 50Ω
Z
o
50Ω
RTT
50Ω
V
CC
FIN
- 2V
Ω
12
transmission lines. Matched impedance techniques should be
used to maximize operating frequency and minimize signal
distortion. Figures 4A and 4B show two different layouts which are
recommended only as guidelines. Other suitable clock layouts may
exist and it would be recommended that the board designers
simulate to guarantee compatibility across all printed circuit and
clock component process variations.
Figure 4B. 3.3V LVPECL Output Termination
FOUT
Z
Z
o
o
= 50Ω
= 50Ω
ICS8735AM-21 REV. A JULY 31, 2008
125Ω
84Ω
3.3V
125Ω
84Ω
FIN