CY8C9520-24PVXI Cypress Semiconductor Corp, CY8C9520-24PVXI Datasheet - Page 14

• Manufacturer Part Number: CY8C9520-24PVXI
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY8C9520-24PVXI

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: SSOP
• Rad Hardened: No
• Lead Free Status / Rohs Status: Compliant

CY8C95xx Preliminary Data Sheet
Table 3-7. Enable Register
Writes to this register differ from other registers. The write
sequence to modify the Enable register is as follows:
1. Send device I2C address with bit 0.
2. Send register address 2Dh.
3. Send unlock key - the sequence of three bytes: 43h, 4Dh,
4. Send new Enable register value.
This write sequence secures the register from accidental
changes. The register can be read without the use of the unlock
key.
By default, EERO and EEPROM (EEE bit) are disabled and WD
line (WDE bit) is set to GPIO (WD disabled).
When performing a burst write operation that crosses this regis-
ter, the data written to this register will be ignored and the
address will increment to 2Eh.
3.2.16
This register stores device identifiers (2xh/4xh/6xh) and reflects
which settings were loaded during startup, either factory
defaults (FD) or user defaults (UD). By default during startup,
the device will attempt to load the user default block. If it seems
to be corrupted then factory defaults are loaded and the low nib-
ble of this register is set high to inform which set is active. The
high nibble is always equal to 2 for CY8C9520, 4 for
CY8C9540, and 6 for CY8C9560.
This register is read-only.
Table 3-8. Device ID Status Register
3.2.17
This register sends commands to the device, including current
configuration as new POR defaults, restore factory defaults,
define POR defaults, read POR defaults, write device configura-
tion, read device configuration, and reconfigure device with
stored POR defaults. The command set is presented in
9.
August 17, 2005
Function
Default
Each ’1’ enables the corresponding feature, ’0’ disables.
Function
53h; ('C', 'M', 'S' in ASCII bytes).
Bit
Bit
Device ID/Status Register (2Eh)
Command Register (30h)
7
7
Device Family (2, 4,or 6)
8
6
Reserved
Reserved
5
5
4
4
3
3
Reserved
EERO
2
Document No. 38-12036 Rev. *A
2
0
1
EEE
1
0
Table 3-
FD/UD
WDE
0
0
0
Note that registers are not restored in parallel. Do not assume
any particular order to the restoration process.
Table 3-9. Available Commands
3.3
3.3.1
The current ports settings (drive modes and output data) and
other configuration registers are saved in the EEPROM by
using the store configuration command (Cmd). These settings
will be automatically loaded after the next device power-up or if
the 07h command is issued.
3.3.2
This command replaces the saved user configuration with the
factory default configuration. Current settings are unaffected by
this command. New settings will be loaded after the next device
power-up or if the 07h command is issued.
3.3.3
This command is used to send new power-up defaults to the
CY8C95xx without changing current settings unless the 07h
command is issued afterwards. This command is followed by
147 data bytes according to
as the XOR of the 146 data bytes (00h-91h). If the CRC check
fails or an incomplete block is sent, then the slave will respond
with a NAK and the data will not be saved to EEPROM.
To define new POR defaults the user must:
Content of the data block is described in
Write command 03h;
Write 146 data bytes with new values of registers;
Write 1 CRC byte calculated as XOR of previous 146 data
bytes.
Command
01h
02h
03h
04h
05h
06h
07h
Commands Description
Store Config to E
Cmd (01h)
Restore Factory Defaults Cmd (02h)
Write E
Store device configuration to EEPROM POR defaults
Restore Factory Defaults
Write EEPROM POR defaults
Read EEPROM POR defaults
Write device configuration
Read device configuration
Reconfigure device with stored POR defaults
2
POR Defaults Cmd (03h)
Table
Description
3-10. The CRC is calculated
2
POR Defaults
3. Register Reference
Table
3-10.
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