STA333BW STMicroelectronics, STA333BW Datasheet - Page 15
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STA333BW
Manufacturer Part Number
STA333BW
Description
Manufacturer
STMicroelectronics
Datasheet
1.STA333BW.pdf
(67 pages)
Specifications of STA333BW
Operational Class
Class-AB
Audio Amplifier Output Configuration
1-Channel Mono/2-Channel Stereo
Audio Amplifier Function
Speaker
Total Harmonic Distortion
0.2@8Ohm@1W%
Single Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (typ)
3.3/5/9/12/15/18V
Power Supply Requirement
Quad
Rail/rail I/o Type
No
Power Supply Rejection Ratio
80dB
Single Supply Voltage (min)
Not RequiredV
Single Supply Voltage (max)
Not RequiredV
Dual Supply Voltage (min)
2.7/4.5V
Dual Supply Voltage (max)
3.6/21.5V
Operating Temp Range
-20C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
36
Package Type
PowerSSO EP
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STA333BW
Manufacturer:
ST
Quantity:
20 000
Part Number:
STA333BW13TR
Manufacturer:
ST
Quantity:
20 000
Part Number:
STA333BWJ13TR
Manufacturer:
ST
Quantity:
20 000
Part Number:
STA333BWTR-9LF
Manufacturer:
ST
Quantity:
20 000
STA333BW
3.6
Note:
Power-on/off sequence
Figure 4.
The definition of a stable clock is when f
Section
I
Figure 5.
2
S interface.
VCC
VCC
VDD_Dig
VDD_Dig
XTI
XTI
Soft Mute
Soft Mute
Reg. 0x07
Reg. 0x07
Data 0xFE
Data 0xFE
Soft EAPD
Soft EAPD
Reg. 0x05
Reg. 0x05
Bit 7 = 0
Bit 7 = 0
VCC
VCC
VCC
VCC
VCC
VDD_Dig
VDD_Dig
VDD_Dig
VDD_Dig
VDD_Dig
XTI
XTI
XTI
XTI
XTI
Reset
Reset
Reset
Reset
Reset
I
I
I
I
I
PWDN
PWDN
PWDN
PWDN
PWDN
2
2
2
2
2
TR = minimum time between XTI master clock stable and Reset removal: 1 ms
TC = minimum time between Reset removal and I
C
C
C
C
C
Serial audio input interface format on page 25
Power-on sequence
Power-off sequence for pop-free turn-off
Don’t care
Don’t care
Don’t care
Don’t care
Don’t care
Don’t care
Don’t care
Note: no specific VCC and
VDD_DIG turn
is required
Don’t care
Don’t care
Doc ID 13773 Rev 3
Don’t care
Don’t care
Don’t care
Don’t care
Don’t care
max
−
on sequence
TR
TR
TR
TR
TR
- f
2
C program, sequence start: 1ms
FE
FE
min
< 1 MHz.
gives information on setting up the
TC
TC
TC
TC
TC
Note: no specific VCC and
VDD_DIG turn
is required
Electrical specifications
CMD0
CMD0
CMD0
CMD0
CMD0
Don’t care
Don’t care
Don’t care
Don’t care
CMD1
CMD1
CMD1
CMD1
CMD1
−
Don’t care
Don’t care
Don’t care
Don’t care
off sequence
CMD2
CMD2
CMD2
CMD2
CMD2
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