PSB4860HV4.1 Lantiq, PSB4860HV4.1 Datasheet - Page 122

• Manufacturer Part Number: PSB4860HV4.1
• Manufacturer: Lantiq

Specifications of PSB4860HV4.1

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Data Sheet
Figure 64 Configuration Register Write Access or Register Read Command
For all commands the external signal INT is deactivated as long as the chip is selected
(CS is low). For a detailed discussion about the behavior of the interrupt signal please
see section 2.3.4. Table 93 shows the formats of the different command words. All other
command words are reserved. Note that interrupts are only acknowledged (cleared) if
the command read status/data with interrupt acknowledge is issued.
Table 93
1)
In case of a configuration register write, W determines what configuration register is to
be written (table 94):
Table 94
Read Configuration Reg.
Write Configuration Reg.
Read Status Register or
Read Status Register or
(interrupt acknowledge)
Does not acknowledge interrupt.
9
0
0
1
1
Data Read Access
Data Read Access
Read Register
Write Register
8
0
1
0
1
Command Words for Register Access
Address Field W for Configuration Register Write
Register
HWCONFIG 0
HWCONFIG 1
HWCONFIG 2
HWCONFIG 3
1)
1)
1)
SCLK
SDR
c
CS
15
15
0
1
0
0
0
0
,..,c
0
14
: command word for configuration register write
0
0
1
1
1
1
or register read
13
1
0
0
0
1
1
c
15
12
c
1
1
1
0
1
0
14
11
0
0
0
0
:
122
c
10
0
0
0
0
1
c
0
R
9
0
0
W
8
0
0
0
7
0
0
0
6
0
0
0
REG
REG
5
0
0
0
:
4
0
0
0
DATA
0
0
3
0
PSB 4860
0
0
2
0
2000-01-14
0
0
1
0
0
0
0
0