PSB4860HV4.1 Lantiq, PSB4860HV4.1 Datasheet - Page 54

• Manufacturer Part Number: PSB4860HV4.1
• Manufacturer: Lantiq

Specifications of PSB4860HV4.1

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Data Sheet
Table 22
Register # of Bits
STATUS 1
CPT is not affected by reading the status word. It is automatically reset when the unit is
disabled. Table 23 shows the control register for the CPT detector.
Table 23
Register
CPTCTL
CPTCTL
CPTCTL
CPTMN
CPTMN
CPTMX
CPTMX
CPTDT
CPTDT
CPTTR
CPTTR
CPTTR
If any condition is violated during a sequence of cycles the timing checker is reset and
restarts with the next valid burst.
Note: In cooked mode CPT is set with the first burst after the programmed number of
Note: The number of cycles must be set to zero in raw mode.
Note: The UTD bit is at the same position as the CPT bit. Therefore the CPT detector
cycles has been detected. If CPTTR:NUM = 2, then CPT is set with the third signal
burst.
and the UTD must not run at the same time.
CPT Detector Result
CPT Detector Registers
# of Bits Name
1
1
5
8
8
8
8
8
8
3
8
4
Name
CPT
EN
MD
I1
MINB
MING
MAXB
MAXG
DIFB
DIFG
NUM
MIN
SN
Comment
CP tone currently detected [300 Hz; 640 Hz]
Comment
Unit enable
Mode (cooked, raw)
Input signal selection
Minimum time of a signal burst (t
Minimum time of a signal gap (t
Maximum time of a signal burst (t
Maximum time of a signal gap (t
Maximum difference between consecutive bursts
Maximum difference between consecutive gaps
Number of cycles (cooked mode), 0 (raw mode)
Minimum signal level to detect tones
Minimal signal-to-noise ratio
54
Gmin
Gmax
Bmin
Bmax
)
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PSB 4860
2000-01-14