TDA6508TT NXP Semiconductors, TDA6508TT Datasheet - Page 10

• Manufacturer Part Number: TDA6508TT
• Manufacturer: NXP Semiconductors

Specifications of TDA6508TT

• Pin Count: 32
• Screening Level: Commercial
• Package Type: TSSOP
• Lead Free Status / Rohs Status: Compliant

Philips Semiconductors
Table 4 Reference divider ratio selection bits
Note
1. Crystal oscillator frequency or externally sourced reference frequency of 4 MHz at pin XTAL_REF.
Table 5 Test mode selection bits
Notes
1. This is the default mode at power-on reset.
2.
3. Port P3 cannot be used when these test modes are active.
8.3
The read mode is defined by setting bit R/W to logic 1 in
address byte ADB; see Table 6.
After the slave address has been recognized, the device
generates an acknowledge pulse, and status byte SB is
transferred on the SDA line (MSB first). Data is valid on the
SDA line when pin SCL is HIGH. A second data byte can
be read from the device if the microcontroller generates an
acknowledge on the SDA line (master acknowledge).
End of transmission will occur if no master acknowledge is
asserted. The device will then release the data line to allow
the microcontroller to generate a STOP condition.
Bit POR is set to logic 1 at power-on. This bit is reset when
an end-of-data is detected by the device at the end of a
read sequence. Bit FL controls the PLL by indicating when
the loop is locked (bit FL = 1).
2005 Mar 25
X
0
1
0
0
0
0
1
1
1
1
3-band mixer/oscillator and PLL for
terrestrial tuners
1
T2
2
f
div
RSA
Read mode
is output from port P3 when the charge-pump is off.
0
0
1
1
1
1
0
0
T1
0
1
1
RSB
0
1
0
1
0
1
0
1
T0
80
128
64
normal mode (read and write mode bytes allowed)
normal mode (read and write mode bytes allowed)
charge-pump is off
byte BB ignored
charge-pump sinks current
charge-pump sources current
1
1
2
2
f
f
ref
div
REFERENCE DIVIDER RATIO
is output from port P3
is output from port P3
(2)
10
The internal ADC can be used to apply AFC information to
a microcontroller in the IF section of the television via
status byte bits A0, A1 and A2. Up to five voltage levels
can be applied to the ADC input pin ADC; the resultant
values of bits A2, A1 and A0 are shown in Table 8.
(3)
(3)
TEST MODE
50
31.25
62.5
TDA6508; TDA6508A;
TDA6509; TDA6509A
FREQUENCY STEP (kHz)
(1)
Product specification
(1)