"CX24109-11Z,518" NXP Semiconductors, "CX24109-11Z,518" Datasheet - Page 21

"CX24109-11Z,518"

Manufacturer Part Number
"CX24109-11Z,518"
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of "CX24109-11Z,518"

Lead Free Status / Rohs Status
Compliant
NXP Semiconductors
Table 7.
1.7.1
CX24109_N_1
Product data sheet
Bit 15
Bit 18
0
0
1
1
0
0
1
1
PLL Programming
Gain Equations
Bit 16
0
1
The RF block voltage gain (G
G
VGA1 voltage gain G
VGA2 voltage gain G
The total baseband voltage gain G
G
G
G
where the maximum value of G
RF
VGA1
VGA2
Baseband
Bit 14
Bit 17
=
0
1
0
1
0
1
0
1
=
=
V
AGC
V
=
=
VGA2 Offset
AGC
G
G
×
VGA1
VGA1
VCA Slope VCA Offset in dB
×
26
(
(
+ +
+
+
3
G
Rev. 01 — 13 November 2008
VGA1
VGA2
Charge Pump Current
Charge Pump Polarity
VGA1 Offset in dB
Filter
Reference Dividers
(
in dB
G
) is equal to
) is equal to
VGA2
+
G
)
(
RF
VGA2
RF
Baseband
is 23 dB, regardless of voltage
) is equal to the VCA gain + the mixer gain.
(
) is equal to
(
)
)
+
Current (mA)
23
Function
Function
Reserved
Reserved
Negative
Positive
÷10
1
2
3
4
Chapter 1: Functional Description
CX24109
© NXP B.V. 2008. All rights reserved.
21

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