PXAS30KBA NXP Semiconductors, PXAS30KBA Datasheet - Page 48

• Manufacturer Part Number: PXAS30KBA
• Description: Microcontrollers (MCU) XA 16BIT 1KR/ADC/I2C ROMLESS 277Q1
• Manufacturer: NXP Semiconductors

Specifications of PXAS30KBA

• Data Bus Width: 16 bit
• Program Memory Type: ROM
• Data Ram Size: 1024 B
• Interface Type: UART, I2C
• Maximum Clock Frequency: 30 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-188
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / Rohs Status: Details
• Other names: PXAS30KBA,512

1. P – programmed. U – unprogrammed.
2. Any other combination of the security bits is not defined.
Philips Semiconductors
EPROM CHARACTERISTICS
The XA-S3 is programmed by using a modified Improved
Quick-Pulse Programming
the same as that used by 80C51 family EPROM parts. However
different pins are used for many programming functions.
The XA-S3 contains three signature bytes that can be read and
used by an EPROM programming system to identify the device. The
signature bytes identify the device as an XA-S3 manufactured by
Philips.
Table 6. Program Security Bits
NOTES:
ROM CODE SUBMISSION
When submitting ROM code for the XA-S3, the following must be specified:
1. 32k byte user ROM data
2. ROM security bits.
2000 Dec 01
Trademark phrase of Intel Corporation.
XA 16-bit microcontroller
32 K/1 K OTP/ROM/ROMless, 8-channel 8-bit A/D, low voltage (2.7 V–5.5 V),
I
ADDRESS
0000H to 7FFFH
8020H
8020H
8020H
2
1
2
3
4
C, 2 UARTs, 16 MB address range
PROGRAM LOCK BITS
SB1
U
P
P
P
SB2
U
U
P
P
algorithm. This algorithm is essentially
SB3
U
U
U
P
CONTENT
DATA
SEC
SEC
SEC
PROTECTION DESCRIPTION
No Program Security features enabled.
MOVC instructions executed from external program memory are disabled from fetching code bytes
from internal memory and further programming of the EPROM is disabled.
Same as 2, also verify is disabled.
Same as 3, external execution is disabled. Internal data RAM is not accessible.
48
BIT(S)
7:0
0
1
3
Security Bits
With none of the security bits programmed the code in the program
memory can be verified. When only security bit 1 is programmed,
MOVC instructions executed from external program memory are
disabled from fetching code bytes from the internal memory. All
further programming of the EPROM is disabled. When security bits
1 and 2 are programmed, in addition to the above, verify mode is
disabled. When all three security bits are programmed, all of the
conditions above apply and all external program memory execution
is disabled. (See Table 6.)
COMMENT
User ROM Data
ROM Security Bit 1
ROM Security Bit 2
0 = enable security
1 = disable security
ROM Security Bit 3
0 = enable security
1 = disable security
Preliminary specification
XA-S3