CS5396-KS Cirrus Logic Inc, CS5396-KS Datasheet - Page 26

• Manufacturer Part Number: CS5396-KS
• Description: ADC Dual Delta-Sigma 96KSPS 24-Bit Serial 28-Pin SOIC
• Manufacturer: Cirrus Logic Inc

Specifications of CS5396-KS

• Package: 28SOIC
• Resolution: 24 Bit
• Sampling Rate: 96 KSPS
• Architecture: Delta-Sigma
• Number Of Analog Inputs: 2
• Digital Interface Type: Serial (SPI)
• Input Type: Voltage
• Sample And Hold: Yes
• Polarity Of Input Voltage: Bipolar

HPEN (HP enable) Default = ‘0’.
S/_M (Slave / Master mode) Default = ‘0’.
DFS (Digital Format Select)Default = ‘0’.
MUTE
Audio port (address 00000011)
24bit(SDATA1)
24bit(SDATA2)
psycho(SDATA1)
psycho(SDATA2)
psel18/_16(Psycho 18bit or 16bit)
psel20/_16(Psycho 20bit)
LGD(sdata1)
LGD(sdata2)
26
(sdata1)
24bit
7
1
(sdata2)
24bit
enabled following calibration.
In master mode, LRCK, and SCLK are outputs. In slave mode, LRCK and SCLK are inputs.
This bit is ignored when sdata1 is used as input port in “fir2in” or “psychoin” mode (refer to Dig-
ital control & Tag register and Appendix B).
Output of serial data complies with I
put of serial data is Left Justified when DFS is 0.
Data at SDATA1 and SDATA2 is always ‘0’ when this set to ‘1’.
A ‘1’ enables the serial audio port 1 to transmit the 24-bit high precision output.
This bit must be set to ‘0’ to enable other SDATA1 output options.
A ‘1’ enables the serial audio port 2 to transmit 24-bit high precision output. This bit must be set
to ‘0’ to enable other SDATA2 output options.
psychoacoustic output will be the data at the serial audio port 1 if this bit is ‘1’ and all other bits
of the port are set to ‘0’.
psychoacoustic output will be the data at the serial audio port 2 if this bit is ‘1’ and all other bits
of the port are set to ‘0’.
Default = ‘0’.
This bit indicates the number of output bit if the psychoacoustic filter is chosen as output. A ‘0’
here allows 16 bits output whereas a ‘1’ allows 18 bits output as long as “psel20/_16” is ‘0’.
Default = ‘0’.
This bit has the highest priority when setting the number of output bit of psychoacoustic filter. If
this bit is ‘1’, the output is set to 20-bit regardless of the status of “psel18/_16”.
24-bit low-group-delay filter output will go through a highpass filter if “_hpen” bit in the Mode
register is ‘0’. The LGD output will be the data at the serial audio port 1 if this bit is ‘1’ and all
other bits of the port set to ‘0’.
Default = ‘0’.
Default = ‘1’.
Default = ‘0’.
Default = ‘0’.
Default = ‘0’.
Default = ‘0’.
Default = ‘1’.
6
The highpass filter will be disabled when _HPEN = ‘1’. The highpass filter will be automatically
0
(sdata1)
psycho
5
0
(sdata2)
psycho
4
0
2
S standard when DFS is 1.
psel18/_16
3
0
psel20/_16
2
0
CS5396 CS5397
(sdata1)
lgd
1
0
DS229PP2
(sdata2)
lgd
0
1
Out-