M25P16-VMN6P Micron Technology Inc, M25P16-VMN6P Datasheet - Page 55

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M25P16-VMN6P

Manufacturer Part Number
M25P16-VMN6P
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of M25P16-VMN6P

Cell Type
NOR
Density
16Mb
Access Time (max)
8ns
Interface Type
Serial (SPI)
Boot Type
Not Required
Address Bus
1b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
SOIC N
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
2M
Supply Current
12mA
Mounting
Surface Mount
Pin Count
8
Lead Free Status / Rohs Status
Compliant

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13
Revision history
Table 24.
13-Dec-2002
24-Sep-2003
24-Nov-2003
01-Aug-2005
27-Feb-2006
16-Jan-2002
20-Jun-2003
23-Apr-2002
01-Apr-2005
20-Oct-2005
04-Jul-2006
15-May-
17-May-
2003
2004
Date
Document revision history
Revision
0.1
0.4
0.5
0.6
0.7
0.8
1.0
2.0
3.0
4.0
5.0
6.0
7
8
8x6 MLP8 and SO16(300 mil) packages added
Target Specification Document written
Clarification of descriptions of entering Standby Power mode from Deep
Power-down mode, and of terminating an instruction sequence or data-
out sequence.
ICC2(max) value changed to 10μA
Typical Page Program time improved. Write Protect setup and hold times
specified, for applications that switch Write Protect to exit the Hardware
Protection mode immediately before a WRSR, and to enter the Hardware
Protection mode again immediately after
MLP8 package added
50MHz operation, and RDID instruction added. Published internally, only
t
Reference Voltage changed. Document promoted to Preliminary Data.
Table of contents, warning about exposed paddle on MLP8, and Pb-free
options added.
Value of t
packages. Document promoted to full Datasheet.
MLP8(5x6) package removed. Soldering temperature information
clarified for RoHS compliant devices. Device Grade clarified
Notes 1 and 2 removed from
Small text changes.
Read Identification
Deep Power-down and Read Electronic Signature (RES)
and
paragraph clarified.
Updated Page Program (PP) instructions in
Program (PP)
VFQFPN8 package added (see
thin fine pitch quad flat package no lead, 6 × 5 mm, package outline
Table 17: VFQFPN8 (MLP8) 8-lead very thin fine pitch quad flat package
no lead, 6 × 5 mm, package mechanical
All packages are RoHS compliant. “Blank” option removed under
Technology.
SO8 Narrow and SO8 Wide packages added (see
mechanical). VDFPN8 package updated (see
8-lead very thin dual flat package no lead, 8 × 6 mm, package
mechanical
scheme.
Figure 4: Bus master and memory devices on the SPI bus
Note 2
Table
PP
, t
Active Power, Standby Power and Deep Power-down modes
SE
19). Small text changes.
added. SO8N package specifications updated (see
and t
VSL
data).
BE
(min) and t
and Table 15: AC characteristics (Grade 6).
revised. SO16 package code changed. Output Timing
Note 2
(RDID),
BE
added to
(typ) changed. Change of naming for VDFPN8
Deep Power-down (DP)
Table 23: Ordering information
Changes
Figure 27: VFQFPN8 (MLP8) 8-lead very
Table 23: Ordering information
data).
Page
Table 18: VDFPN8 (MLP8)
programming,
Section 11: Package
and
Release from
instructions,
updated and
Figure 29
scheme.
Page
Plating
and
55/56
and

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