LX16EVK01/NOPB National Semiconductor, LX16EVK01/NOPB Datasheet - Page 32

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LX16EVK01/NOPB

Manufacturer Part Number
LX16EVK01/NOPB
Description
KIT EVAL FOR DS92LX1621/22
Manufacturer
National Semiconductor
Datasheet

Specifications of LX16EVK01/NOPB

Lead Free Status / Rohs Status
Lead free / RoHS Compliant
www.national.com
I
I
dently address slave devices. The mode enables or disables
I
I
I
vice. When enabled, the I
through and will be received by I
disabled, I
device. The pass through function also provides access and
SYNCHRONIZING MULTIPLE CAMERAS
For applications requiring multiple cameras for frame-syn-
chronization, it is recommended to utilize the General Pur-
pose Input/Output (GPIO) pins to transmit control signals to
synchronize multiple cameras together. To synchronize the
cameras properly, the system controller needs to provide a
field sync output (such as a vertical or frame sync signal) and
the cameras must be set to accept an auxiliary sync input.
The vertical synchronize signal corresponds to the start and
end of a frame and the start and end of a field. Note this form
of synchronization timing relationship has a non-deterministic
latency. After the control data is reconstructed from the bi-
2
2
2
2
2
C PASS THROUGH
C pass-through provides an alternative means to indepen-
C bidirectional control channel communication to the remote
C bus. This option is used to determine whether or not an
C instruction is to be transferred over to the remote I
2
C commands will be blocked to the remote I
2
C bus traffic will continue to pass
2
C devices downstream. If
FIGURE 27. I
2
C de-
2
C
2
C Pass Through
32
communication to only specific devices on the remote bus.
The feature is effective for both Camera mode and Display
mode.
For example in the configuration shown in
If master controller transmits I
0xA0, the SER A with I
I
through disabled, any I
I
directional control channel, there will be a time variation of the
GPIO signals arriving at the different target devices (between
the parallel links). The maximum latency delta (t1) of the GPIO
data transmitted across multiple links is 25 μs.
Note: The user must verify that the timing variations between
the different links are within their system and timing specifi-
cations.
For example in the configuration shown in
The maximum time (t1) between the rising edge of GPIO (i.e.
sync signal) arriving at Camera A and Camera B is 25 μs.
2
2
C commands to remote Camera A. The SER B with I
C bus to Camera B.
2
2
C commands will be bypassed on the
C pass through enabled will transfer
2
C transaction for address
Figure
Figure
30123004
27:
28:
2
C pass

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