P87C54X2FBD NXP Semiconductors, P87C54X2FBD Datasheet - Page 50

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P87C54X2FBD

Manufacturer Part Number
P87C54X2FBD
Description
MCU 8-Bit 87C 80C51 CISC 16KB EPROM 5V 44-Pin LQFP Tray
Manufacturer
NXP Semiconductors
Datasheet

Specifications of P87C54X2FBD

Package
44LQFP
Device Core
80C51
Family Name
87C
Maximum Speed
33 MHz
Ram Size
256 Byte
Program Memory Size
16 KB
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Program Memory Type
EPROM
Number Of Programmable I/os
32
Interface Type
UART
Operating Temperature
-40 to 85 °C
Number Of Timers
3

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
P87C54X2FBD,157
Manufacturer:
NXP Semiconductors
Quantity:
10 000
1. ‘0’ = Valid low for that pin, ‘1’ = valid high for that pin.
2. V
3. V
4. Bit is output on P0.4 (1 = 12x, 0 = 6x).
5. Security bit one is output on P0.7.
*
1. P – programmed. U – unprogrammed.
2. Any other combination of the security bits is not defined.
Philips Semiconductors
Table 9. EPROM Programming Modes
NOTES:
Table 10. Program Security Bits for EPROM Devices
NOTES:
2003 Jan 24
Read signature
Program code data
Verify code data
Pgm encryption table
Pgm security bit 1
Pgm security bit 2
Pgm security bit 3
Program to 6-clock mode
Verify 6-clock
Verify security bits
80C51 8-bit microcontroller family
4K/8K/16K/32K ROM/OTP, low voltage (2.7 to 5.5 V),
low power, high speed (30/33 MHz)
Security bit two is output on P0.6.
Security bit three is output on P0.3.
ALE/PROG receives 5 programming pulses for code data (also for user array; 5 pulses for encryption or security bits) while V
12.75 V. Each programming pulse is low for 100 s ( 10 s) and high for a minimum of 10 s.
1
2
3
4
PP
CC
PROGRAM LOCK BITS
= 12.75 V 0.25 V.
= 5 V 10% during programming and verification.
SB1
MODE
U
P
P
P
4
5
SB2
U
U
P
P
1, 2
SB3
U
U
U
P
RST
1
1
1
1
1
1
1
1
1
1
PROTECTION DESCRIPTION
No Program Security features enabled. (Code verify will still be encrypted by the Encryption Array if
programmed.)
MOVC instructions executed from external program memory are disabled from fetching code bytes
from internal memory, EA is sampled and latched on Reset, and further programming of the EPROM
is disabled.
Same as 2, also verify is disabled.
Same as 3, external execution is disabled. Internal data RAM is not accessible.
PSEN
0
0
0
0
0
0
0
0
0
0
ALE/PROG
0*
0*
0*
0*
0*
0*
1
1
1
1
50
EA/V
V
V
V
V
V
V
1
1
1
1
PP
PP
PP
PP
PP
PP
PP
P2.7
0
1
0
1
1
1
0
0
e
e
P2.6
0
0
0
0
1
1
1
0
0
0
P80C3xX2; P80C5xX2;
P3.7
0
1
1
1
1
0
0
1
0
1
P3.6
P87C5xX2
0
1
1
0
1
0
1
0
1
0
PP
Product data
is held at
P3.3
X
X
X
X
X
X
X
X
0
1

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