IS43DR16160A-25EBLI ISSI, Integrated Silicon Solution Inc, IS43DR16160A-25EBLI Datasheet - Page 9

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IS43DR16160A-25EBLI

Manufacturer Part Number
IS43DR16160A-25EBLI
Description
Manufacturer
ISSI, Integrated Silicon Solution Inc
Datasheet

Specifications of IS43DR16160A-25EBLI

Lead Free Status / Rohs Status
Compliant
IS43/46DR83200A, IS43/46DR16160A
Input DC logic level
Input AC logic level
Notes:
1. Refer to Overshoot/undershoot specifications for Vpeak value: maximum peak amplitude allowed for overshoot and undershoot.
AC Input Test Conditions
Notes:
1. Input waveform timing is referenced to the input signal crossing through the VIH/IL(AC) level applied to the device under test.
2. The input signal minimum slew rate is to be maintained over the range from VREF to VIH(ac) min for rising edges and the range from VREF to
3. AC timings are referenced with input waveforms switching from VIL(ac) to VIH(ac) on the positive transitions and VIH(ac) to VIL(ac) on the
AC input test signal waveform
Integrated Silicon Solution, Inc. — www.issi.com
Rev.  B
05/24/2011
Symbol Parameter
VIH (ac) ac input logic HIGH
VIL (ac)
Symbol
VREF
VSWING(MAX) Input signal maximum peak to peak swing
SLEW
Symbol 
VIH(dc)
VIL(dc)
VIL(ac) max for falling edges as shown in the below figure.
negative transitions.
ac input logic LOW
Parameter
dc input logic HIGH
dc input logic LOW
Condition
Input reference voltage
Input signal minimum slew rate
V
Falling Slew =
SWING(MAX)
VSSQ - Vpeak
VREF + 0.250
DTF
V
REF
VREF + 0.125
DDR2-400, DDR2-533
Min.
- V
DTF
Min.
- 0.3
IL(ac)
max
VDDQ + Vpeak
VREF - 0.250
Max.
VREF - 0.125
VDDQ + 0.3
Max.
0.5 x VDDQ
Rising Slew =
Value
DTR
1.0
1.0
VSSQ - Vpeak
VREF + 0.200
DDR2-667, DDR2-800
Min.
Units
V
V
Units
V/ns
V
V
V
IH(ac)
Notes
VDDQ + Vpeak
V
V
V
V
V
V
V
VREF - 0.200
min - V
DTR
DDQ
IH(ac)
IH(dc)
REF
IL(dc)
IL(ac)
SS
Notes
1
1
2, 3
Max
max
max
REF
min
min
Units Notes
V
V
1
1
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