DS2156L+ Maxim Integrated Products, DS2156L+ Datasheet - Page 20

• Manufacturer Part Number: DS2156L+
• Description: IC TXRX T1/E1/J1 1-CHIP 100-LQFP
• Manufacturer: Maxim Integrated Products

Specifications of DS2156L+

• Function: Single-Chip Transceiver
• Interface: E1, J1, T1, TDM, UTOPIA II
• Number Of Circuits: 1
• Voltage - Supply: 3.14 V ~ 3.47 V
• Current - Supply: 75mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Includes: BERT Generator and Detector, CMI Coder and Decoder, HDLC Controller
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -

3. PIN FUNCTION DESCRIPTION
The DS2156 has a user-selectable TDM or UTOPIA backplane. Table 3-A and Table 3-B indicate which
pins have alternate functions depending on the backplane selected. Note that even when the UTOPIA
backplane is selected, the basic TDM signals such as clock, data, and frame-sync are available for both
the transmit and receive directions.
3.1
3.1.1 Transmit Side
Signal Name:
Signal Description:
Signal Type:
A 1.544MHz (T1) or a 2.048MHz (E1) primary clock. Used to clock data through the transmit-side formatter.
TCLK can be internally sourced from MCLK. This is the most flexible method and requires only a single clock
signal for both T1 or E1. If internal sourcing is used, then the TCLK pin should be connected low.
Signal Name:
Signal Description:
Signal Type:
Transmit NRZ serial data. Sampled on the falling edge of TCLK when the transmit-side elastic store is disabled.
Sampled on the falling edge of TSYSCLK when the transmit-side elastic store is enabled.
Signal Name:
Signal Description:
Signal Type:
A 192kHz (T1) or 256kHz (E1) clock that pulses high during the LSB of each channel. Can also be programmed to
output a gated transmit bit clock on a per-channel basis. Synchronous with TCLK when the transmit-side elastic
store is disabled. Synchronous with TSYSCLK when the transmit-side elastic store is enabled. Useful for parallel-
to-serial conversion of channel data.
Signal Name:
Signal Description:
Signal Type:
A user-programmable output that can be forced high or low during any of the channels. Synchronous with TCLK
when the transmit-side elastic store is disabled. Synchronous with TSYSCLK when the transmit-side elastic store is
enabled. Useful for blocking clocks to a serial UART or LAPD controller in applications where not all channels are
used such as Fractional T1, Fractional E1, 384kbps (H0), 768kbps, or ISDN–PRI. Also useful for locating
individual channels in drop-and-insert applications, for external per-channel loopback, and for per-channel
conditioning.
Signal Name:
Signal Description:
Signal Type:
1.544MHz, 2.048MHz, 4.096MHz, 8.192MHz, or 16.384MHz clock. Only used when the transmit-side elastic
store function is enabled. Should be connected low in applications that do not use the transmit-side elastic store.
See Section 28 for details on 4.096MHz, 8.192MHz, and 16.384MHz operation using the IBO.
TDM Backplane
TCLK
Transmit Clock
Input
TSER
Transmit Serial Data
Input
TCHCLK
Transmit Channel Clock
Output
TCHBLK
Transmit Channel Block
Output
TSYSCLK
Transmit System Clock
Input
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