SC16IS740IPW,112 NXP Semiconductors, SC16IS740IPW,112 Datasheet - Page 48
![IC UART SINGLE W/FIFO 16-TSSOP](/photos/6/56/65607/568-16-tssop_sot403-1_sml.jpg)
SC16IS740IPW,112
Manufacturer Part Number
SC16IS740IPW,112
Description
IC UART SINGLE W/FIFO 16-TSSOP
Manufacturer
NXP Semiconductors
Type
UART with 64-byte FIFOs and IrDA encoder/decoderr
Datasheet
1.SC16IS740IPW112.pdf
(62 pages)
Specifications of SC16IS740IPW,112
Number Of Channels
1, UART
Package / Case
16-TSSOP (0.173", 4.40mm Width)
Fifo's
64 Byte
Protocol
RS232, RS485
Voltage - Supply
2.5V, 3.3V, 5V
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
Mounting Type
Surface Mount
Data Rate
5 Mbps
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.3 V
Supply Current
6 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
2.5 V, 3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
568-4000 - DEMO BOARD SPI/I2C TO DUAL UART568-3510 - DEMO BOARD SPI/I2C TO UART
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-3648-5
935280988112
SC16IS740IPW
935280988112
SC16IS740IPW
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SC16IS740IPW,112
Manufacturer:
JAMICON
Quantity:
101
NXP Semiconductors
SC16IS740_750_760_6
Product data sheet
Fig 25. SCL delay after reset
Fig 26. I
Fig 27. Write to output (SC16IS750 and SC16IS760 only)
Fig 28. Modem input pin interrupt (SC16IS750 and SC16IS760 only)
MODEM pin
SDA
IRQ
Rise and fall times refer to V
2
C-bus timing diagram
protocol
SDA
GPIOn
SCL
SDA
SLAVE ADDRESS
t
SU;STA
t
BUF
condition
START
RESET
(S)
t
HD;STA
SCL
SLAVE ADDRESS
IL
and V
W
t
d2
t
LOW
t
r
IH
A
MSB
bit 7
(A7)
.
t
A
HIGH
MSR REGISTER
Single UART with I
W
Rev. 06 — 13 May 2008
t
t
SU;DAT
w(rst)
t
f
A
1
/f
bit 6
(A6)
SCL
A
IOSTATE REG.
t
HD;DAT
A
t
d15
S
SLAVE ADDRESS
(R/W)
2
bit 0
LSB
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
t
A
VD;DAT
acknowledge
SC16IS740/750/760
t
SP
(A)
DATA
002aab437
t
R
VD;ACK
t
d1
condition
A
STOP
(P)
A
t
SU;STO
002aab255
002aab489
t
DATA
d3
ACK to master
© NXP B.V. 2008. All rights reserved.
A
002aab256
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