PCF2123BS/1 NXP Semiconductors, PCF2123BS/1 Datasheet - Page 18

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PCF2123BS/1

Manufacturer Part Number
PCF2123BS/1
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCF2123BS/1

Lead Free Status / Rohs Status
Compliant

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PCF2123
Product data sheet
8.5.4 Register Weekday_alarm
8.5.5 Alarm flag
Table 21.
[1]
By clearing the MSB, AE_x (Alarm Enable), of one or more of the alarm registers the
corresponding alarm condition(s) are active. When an alarm occurs, AF (register
Control_2, see
interrupt (INT). The AF is cleared using the interface.
The registers at addresses 09h through 0Ch contain alarm information. When one or
more of these registers is loaded with minute, hour, day, or weekday, and its
corresponding Alarm Enable bit (AE_x) is logic 0, then that information is compared with
the current minute, hour, day, and weekday. When all enabled comparisons first match,
the Alarm Flag (AF) is set logic 1.
Bit
7
6 to 3
2 to 0
Fig 12. Alarm function block diagram
Default value.
(1) Only when all enabled alarm settings are matching.
Symbol
AE_W
-
WEEKDAY_ALARM
It’s only on increment to a matched case that the alarm flag is set, see
Weekday_alarm - weekday alarm register (address 0Ch) bit description
check now signal
Table
All information provided in this document is subject to legal disclaimers.
WEEKDAY ALARM
MINUTE ALARM
WEEKDAY TIME
HOUR ALARM
MINUTE TIME
DAY ALARM
HOUR TIME
DAY TIME
7) is set logic 1. The asserted AF can be used to generate an
Rev. 5 — 27 April 2011
Value
0
1
-
0 to 6
[1]
=
=
=
=
AE_W
AE_M
AE_H
AE_D
Description
weekday alarm is enabled
weekday alarm is disabled
unused
weekday alarm information coded in BCD
format
set alarm flag AF
SPI Real time clock/calendar
AE_M = 1
example
013aaa088
Section
1
0
(1)
PCF2123
© NXP B.V. 2011. All rights reserved.
8.5.5.
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