pcf2123 NXP Semiconductors, pcf2123 Datasheet

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pcf2123

Manufacturer Part Number
pcf2123
Description
Spi Real Time Clock/calendar
Manufacturer
NXP Semiconductors
Datasheet

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1. General description
2. Features
3. Applications
The PCF2123 is a CMOS real time clock and calendar optimized for low power
applications. Data is transferred serially via a Serial Peripheral Interface bus (SPI-bus)
with a maximum data rate of 6.25 Mbit/s. An alarm and timer function is also available
providing the possibility to generate a wake-up signal on an interrupt pin. An offset register
allows fine tuning of the clock.
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PCF2123
SPI Real time clock/calendar
Rev. 01 — 19 November 2008
Real time clock provides year, month, day, weekday, hours, minutes and seconds
based on a 32.768 kHz quartz crystal
Low backup current while running: typical 100 nA at V
Resolution: seconds to years
Watchdog functionality
Freely programmable timer and alarm with interrupt capability
Clock operating voltage: 1.1 V to 5.5 V
3 line SPI-bus with separate combinable data input and output
Serial interface at V
1 second or 1 minute interrupt output
Integrated oscillator load capacitors for C
Internal power-on reset
Open-drain interrupt and clock output pins
Programmable offset register for frequency adjustment
Time keeping application
Battery powered devices
Metering
High duration timers
Daily alarms
Low standby power applications
DD
= 1.6 V to 5.5 V
L
= 7 pF
DD
= 2.0 V and T
Product data sheet
amb
= 25 C

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pcf2123 Summary of contents

Page 1

... SPI Real time clock/calendar Rev. 01 — 19 November 2008 1. General description The PCF2123 is a CMOS real time clock and calendar optimized for low power applications. Data is transferred serially via a Serial Peripheral Interface bus (SPI-bus) with a maximum data rate of 6.25 Mbit/s. An alarm and timer function is also available providing the possibility to generate a wake-up signal on an interrupt pin. An offset register allows fi ...

Page 2

... HVQFN16 plastic thermal enhanced very thin quad flat package; no leads; 16 terminals; body 3 3 PCF2123U/10 wire bond die; 12 bonding pads; 1.492 1.449 Marking codes Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar ...

Page 3

... OSCO MONITOR TEST POWER ON RESET WATCH DOG SDO SDI SPI INTERFACE SCL CE PCF2123 Fig 1. Block diagram of PCF2123 PCF2123_1 Product data sheet DIVIDER OFFSET FUNCTION 0D OFFSET TIMER FUNCTION 0E TIMER/CLKOUT CONTROL 0F COUNTDOWN TIMER CONTROL 00 CONTROL/STATUS 1 01 CONTROL/STATUS 2 TIME 02 OS/SECONDS ...

Page 4

... PCF2123 TEST 5 INT 001aai551 Top view. For mechanical details, see Fig 2. Pinning diagram of PCF2123TS (TSSOP14) Top view. For mechanical details, see Fig 4. Pinning diagram of PCF2123U (bare die) PCF2123_1 Product data sheet terminal 1 index area OSCO 13 CLKOUT 12 CLKOE TEST 11 n ...

Page 5

... DD [1] The die paddle (exposed pad) is wired to V [2] The substrate (rear side of the die) is wired Device protection diagram Fig 5. Device diode protection diagram of PCF2123 PCF2123_1 Product data sheet Description PCF2123U/10 7 oscillator input; high-impedance node; minimize wire length between quartz and package 8 oscillator output ...

Page 6

... NXP Semiconductors 9. Functional description The PCF2123 contains sixteen 8-bit registers with an auto-incrementing address counter, an on-chip 32.768 kHz oscillator with two integrated load capacitors, a frequency divider which provides the source clock for the Real Time Clock (RTC), a programmable clock output, and a 6.25 Mbit/s SPI-bus. An offset register allows fine tuning of the clock. ...

Page 7

... I PCF2123_1 Product data sheet timer clock set to DD (nA) minimum power mode. DD with respect to quartz Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar will reduce current consumption s 001aai558 60 80 100 ( Hz. 60 © NXP B.V. 2008. All rights reserved. ...

Page 8

... PCF2123_1 Product data sheet (2) ( (nA) minimum power mode Hz. 60 with respect to timer clock selection DD Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar 1 Hz will be 60 001aai559 © NXP B.V. 2008. All rights reserved ...

Page 9

... MONTHS (1 to 12) MINUTE_ALARM (0 to 59) - AMPM HOUR_ALARM ( mode HOUR_ALARM ( mode - DAY_ALARM ( OFFSET COF2 COF1 COF0 Section 9.5 Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar 12_24 CIE AIE TIE - WEEKDAYS - WEEKDAY_ALARM TE ...

Page 10

... Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar Reference Section 9.12 - Section 9.13 Section 9.5 [ Section 9.11 - © NXP B.V. 2008. All rights reserved. ...

Page 11

... AIE 0 TIE 9.4 OS flag The PCF2123 includes a flag (bit OS) which is set whenever the oscillator is stopped (see Figure 8 and be cleared, then the PCF2123 oscillator is not running. This method can be used to monitor the oscillator and to determine if the supply voltage has reduced to the point where oscillation fails. ...

Page 12

... SCL CE Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar and flag can be cleared OS flag set when oscillation stops OS flag cleared by software oscillation now stable software reset 58 HEX ...

Page 13

... Days - - Weekdays - - Months - - Years X X Minute_alarm 1 X Hour_alarm 1 - Day_alarm 1 - Weekday_alarm 1 - Offset_register 0 0 Timer_clkout - 0 Countdown_timer X X Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar ...

Page 14

... BCD format Register Minutes (address 03h) bits description Value Description - unused [ this register holds the current minutes coded in BCD format Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar Digit Bit 4 Bit 3 Bit 2 Bit ...

Page 15

... Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar [2] Digit Bit 3 Bit 2 Bit © NXP B.V. 2008. All rights reserved. ...

Page 16

... Register Years (address 08h) bits description Value Description [ this register holds the current year coded in BCD format Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar Table 16 Digit Bit 3 Bit 2 Bit 1 Bit ...

Page 17

... Register Minute_alarm (address 09h) bits description Value Description 0 minute alarm is enabled 1 minute alarm is disabled [1] this register holds the minute alarm information coded in BCD format Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar HOURS WEEKDAY DAYS YEARS 001aaf901 © NXP B.V. 2008. All rights reserved ...

Page 18

... BCD format Register Weekday_alarm (address 0Ch) bits description Value Description 0 weekday alarm is enabled 1 weekday alarm is disabled - unused [ this register holds the weekday alarm information Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar © NXP B.V. 2008. All rights reserved ...

Page 19

... DAY ALARM = DAY TIME WEEKDAY AEN WEEKDAY ALARM = WEEKDAY TIME minutes counter 44 minute alarm 45 AF INT when AIE = 1 Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar example MINUTE AEN = (1) set alarm flag, AF 001aaf902 Section 9.9. 001aaf903 © NXP B.V. 2008. All rights reserved. ...

Page 20

... Hz countdown timer source clock countdown timer source clock countdown timer source clock 60 Table 35. Register Countdown_timer (address 0Ah) bits description Value Description 0h to FFh countdown value = n; CountdownPeriod Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar ...

Page 21

... If the MSF flag is not cleared prior to the next coming interrupt period, an INT pulse will still be generated. The purpose of the fl allow the controlling system to interrogate the PCF2123 and identify the source of the interrupt i.e. minute or second, countdown timer or alarm. Table 27. ...

Page 22

... for power saving. 60 Figure 15 INT Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar Maximum timer duration n = 255 62.256 ms 3.984 s 255 min duration of first timer period after enable may range from © ...

Page 23

... First period delay for timer counter value n Minimum timer period Section 9.11 Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar for details on how the interrupt can Maximum timer period will be affected by the 60 to understand the operation of the © ...

Page 24

... Example to clear both TF and MSF (bit 2 and bit 5) in register Control_2 Bit second long. Alarm interrupts always follow the condition of AF. 128 Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar ...

Page 25

... TF SET PULSE CLEAR GENERATOR 2 TRIGGER CLEAR to interface: AF: ALARM read AF FLAG SET CLEAR PULSE GENERATOR 3 TRIGGER CLEAR Figure 16). Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar INT TI_TP TIE 0 1 E.G.AIE AIE CIE 001aai555 1 second in duration. 64 Section 9.8.3. © NXP B.V. 2008. All rights reserved. ...

Page 26

... SCL instruction CLEAR INSTRUCTION Figure 17 INT operation (bit TI_TP = 1) INT period (s) [ 8192 1 128 Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar (1) 8th clock 001aaf908 is also valid for the non-pulsed n > 4096 Section 9.8.3. ...

Page 27

... AF INT SCL instruction CLEAR INSTRUCTION Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar (1) 8th clock 001aaf909 is also valid for the non-pulsed interrupt Table 8th clock 001aaf910 © NXP B.V. 2008. All rights reserved. 6 ...

Page 28

... The CLKOE pin can be used to block the CLKOUT function and force the CLKOUT pin to an high-impedance state. The effect is the same as setting COF[2:0] = 111. 9.11 Offset register The PCF2123 incorporates an offset register (address 0Dh) which can be used to implement several functions, such as: • ...

Page 29

... Offset value in decimal + Example of converting the offset in ppm to seconds Seconds per Day Week 0.187 1.31 0.375 2.62 Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar Offset value in ppm Normal mode Course mode MODE = 0 MODE = 1 +136.71 +273.42 +134.54 +269. +4.34 +8.68 +2.17 +4. 2.17 4.34 4.34 8.68 ...

Page 30

... For multiple pulses they are repeated at 128 1 second pulse on INT for every correction 128 Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar Correction pulses on INT per [2] minute ...

Page 31

... PCF2123_1 Product data sheet Effect of correction pulses 6 divide chain called a prescaler. The prescaler can be set into a Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar Effect of correction no effect no effect no effect no effect ...

Page 32

... PCF2123_1 Product data sheet Figure 21 9.10). OSC STOP DETECTOR and F 0 Figure Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar held in reset and 2 14 and Table 40). oscillator stop flag ...

Page 33

... F 08:00: 08:00:01 - 08:00:01 - 08:00: 08:00:01 - 08:00: transition of F 001aaf913 Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar 122 s 001aaf912 and F not being reset 0 1 increments the time circuits 14 increments the time circuits 14 © NXP B.V. 2008. All rights reserved ...

Page 34

... SCL; will be high-Z when not driving; may be connected directly to SDI SDI SDO two wire mode data bus COMMAND DATA chip enable Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar Table 41). The DD ; input data is sampled on the rising edge output data SS ...

Page 35

... HEX BCD Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar minutes data 10 BCD 001aaf915 © NXP B.V. 2008. All rights reserved. ...

Page 36

... During read/write operations, the time counting circuits are frozen. To prevent a situation where the accessing device becomes locked and does not clear the interface by setting pin CE LOW, the PCF2123 has a built in watchdog timer. Should the interface be active for more than 1 s from the time a valid subaddress is transmitted, then the PCF2123 will automatically clear the interface and allow the time counting circuits to continue counting ...

Page 37

... Each time the watchdog period is exceeded will be lost from the time counters. The watchdog will trigger between 1 s and 2 s after receiving a valid subaddress. PCF2123_1 Product data sheet Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar © NXP B.V. 2008. All rights reserved ...

Page 38

... HBM voltage MM latch-up current storage temperature . SS Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar Min Max Unit [1] 0.5 +6 +50 mA [1] 0.5 +6.5 V [1] ...

Page 39

... 5 SPI-bus inactive; CLKOUT enabled at 32 kHz +85 C amb pins CE, SDI, SCL, OSCI, CLKOE, CLKOUT Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar = pF; unless otherwise s L Min Typ Max [1] 1.1 - 5.5 - 0.9 - 1.6 - 5.5 - 250 ...

Page 40

... CLKOUT pins OSCO and OSCI = DD(min and C in series. OSCI OSCO Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar = pF; unless otherwise s L Min Typ Max 240 550 [ ...

Page 41

... Max Min 27) - 2.9 - 345 - 220 200 - 120 - 100 - - 100 - 0. 190 - - Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar = Max Min Max Min Max 4.54 - 5.71 - 8.0 - 175 - 125 - - 100 - 100 - ...

Page 42

... Fig 27. SPI-bus timing PCF2123_1 Product data sheet t t clk( 80% 20% RA0 t(SDI-SDO) t d(R)SDO b7 b6 Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar t w(CE) t SCL t rec(CE clk(L) h(CE dis(SDO) b0 001aai554 © NXP B.V. 2008. All rights reserved ...

Page 43

... PCF2123_1 Product data sheet 1 F supercapacitor 100 nF V CLKOE CLKOUT DD OSCI PCF2123 OSCO V SS diode can be used as a standby or back-up F Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar INT CE SCL SDI SDO 001aai557 © NXP B.V. 2008. All rights reserved ...

Page 44

... Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION IEC SOT402-1 Fig 29. Package outline of PCF2123TS (SOT402-1) PCF2123_1 Product data sheet ...

Page 45

... A UNIT max. 0.05 0.30 3 0.2 0.00 0.18 2.9 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. OUTLINE VERSION IEC SOT758 Fig 30. Package outline of PCF2123BS (SOT758-1) PCF2123_1 Product data sheet 1 ...

Page 46

... Notes 1. Dimension includes saw lane 2. P and P : pad size and P : passivation opening 2 4 OUTLINE VERSION IEC PCF2123U/10 Fig 31. Bare die outline of PCF2123U/10 Table 46. Symbol SDO SDI SCL CLKOE CLKOUT V DD OSCI OSCO TEST INT CE [ Alignment mark ...

Page 47

... NXP Semiconductors Fig 32. Alignment mark PCF2123_1 Product data sheet REF 001aai565 Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar © NXP B.V. 2008. All rights reserved ...

Page 48

... Inputs and outputs are protected against electrostatic discharge in normal handling. However completely safe you must take normal precautions appropriate to handling MOS devices; see JESD625-A and/or IEC61340-5 . PCF2123_1 Product data sheet Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar © NXP B.V. 2008. All rights reserved ...

Page 49

... NXP Semiconductors 17. Packing information metal frame 214.50 mm 193.50 mm 1.492 mm 1 1.449 mm 1 straight edge of the wafer detail X Fig 33. PCF2123U/10, sawn wafer on film frame carrier; 200 m thickness PCF2123_1 Product data sheet 214.50 mm 150 mm 73.68 mm 71. plastic film X wafer Rev. 01 — 19 November 2008 ...

Page 50

... Solder bath specifications, including temperature and impurities PCF2123_1 Product data sheet Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar © NXP B.V. 2008. All rights reserved ...

Page 51

... Lead-free process (from J-STD-020C) Package reflow temperature ( C) 3 Volume (mm ) < 350 260 260 250 Figure 34. Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar Figure 34) than a SnPb process, thus 350 220 220 350 to 2000 > 2000 260 260 250 245 245 245 © ...

Page 52

... Metal Oxide Semiconductor Most Significant Bit Moisture Sensitivity Level Printed-Circuit Board Real Time Clock Surface Mount Device Serial Peripheral Interface Data sheet status Product data sheet Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar peak temperature time 001aac844 Change notice Supersedes - - © ...

Page 53

... NXP Semiconductors through its legal department. 21.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com Rev. 01 — 19 November 2008 PCF2123 SPI Real time clock/calendar © NXP B.V. 2008. All rights reserved ...

Page 54

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2008. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 19 November 2008 PCF2123 All rights reserved. Document identifier: PCF2123_1 ...

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