pcf2123 NXP Semiconductors, pcf2123 Datasheet - Page 25

• Manufacturer Part Number: pcf2123
• Description: Spi Real Time Clock/calendar
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PCF2123_1
Product data sheet
Fig 16. Interrupt scheme
COUNTDOWN COUNTER
When bits SI, MI, TIE, AIE and CIE are all disabled, pin INT will remain high-impedance.
SECONDS COUNTER
MINUTES COUNTER
9.9.1 Minute and second interrupts
TE
offset circuit: add/substract
Remark: Note that the interrupts from the four sources are wired-OR, meaning they will
mask one another (see
The pulse generator for the minute and second interrupt operates from an internal 64 Hz
clock and consequently generates a pulse of
If the MSF flag is cleared before the end of the INT pulse, then the INT pulse is shortened.
This allows the source of a system interrupt to be cleared immediately it is serviced i.e.
the system does not have to wait for the completion of the pulse before continuing; see
Figure
from interface:
from interface:
from interface:
from interface:
1/64 Hz pulse
clear MSF
17. Instructions for clearing MSF are given in
set alarm
clear AF
clear TF
flag, AF
set CIE
MI
SI
SET
SET
SET
SECOND FLAG
MSF: MINUTE
AF: ALARM
Rev. 01 — 19 November 2008
TF: TIMER
CLEAR
CLEAR
CLEAR
FLAG
Figure
16).
TRIGGER
TRIGGER
TRIGGER
GENERATOR 1
GENERATOR 2
GENERATOR 3
CLEAR
CLEAR
CLEAR
PULSE
PULSE
PULSE
to interface:
read MSF
to interface:
read TF
to interface:
read AF
1
64
second in duration.
TI_TP
Section
0
1
0
1
SPI Real time clock/calendar
9.8.3.
SI
AIE
CIE
TIE
MI
PCF2123
© NXP B.V. 2008. All rights reserved.
E.G.AIE
001aai555
INT
0
1
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