pcf2123 NXP Semiconductors, pcf2123 Datasheet - Page 26

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pcf2123

Manufacturer Part Number
pcf2123
Description
Spi Real Time Clock/calendar
Manufacturer
NXP Semiconductors
Datasheet

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PCF2123_1
Product data sheet
9.9.2 Countdown timer interrupts
The timing shown for clearing bit MSF in
interrupt mode i.e. when bit TI_TP = 0, INT may be shortened by setting both MI and SI or
MSF to logic 0.
The generation of interrupts from the countdown timer is controlled via bit TIE.
The pulse generator for the countdown timer interrupt also uses an internal clock, but this
time it is dependent on the selected source clock for the countdown timer and on the
countdown value n. As a consequence, the width of the interrupt pulse varies (see
Table
Table 34.
[1]
If the TF flag is cleared before the end of the INT pulse, then the INT pulse is shortened.
This allows the source of a system interrupt to be cleared immediately it is serviced i.e.
the system does not have to wait for the completion of the pulse before continuing (see
Figure
Source clock (Hz)
4096
64
1
1
Fig 17. Example of shortening the INT pulse by clearing the MSF flag
60
n = loaded countdown value. Timer stopped when n = 0.
(1) Indicates normal duration of INT pulse (bit TI_TP = 1)
34).
18). Instructions for clearing MSF can be found in
INT operation (bit TI_TP = 1)
seconds counter
instruction
Rev. 01 — 19 November 2008
MSF
SCL
INT
58
INT period (s)
n = 1
1
1
1
1
8192
128
64
64
59
[1]
Figure 17
CLEAR INSTRUCTION
is also valid for the non-pulsed
Section
SPI Real time clock/calendar
8th clock
n > 1
1
1
1
1
4096
64
64
64
9.8.3.
001aaf908
PCF2123
© NXP B.V. 2008. All rights reserved.
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