SC16IS750IPW,112 NXP Semiconductors, SC16IS750IPW,112 Datasheet - Page 28

• Manufacturer Part Number: SC16IS750IPW,112
• Description: IC UART I2C/SPI 24-TSSOP
• Manufacturer: NXP Semiconductors

Specifications of SC16IS750IPW,112

• Features: Low Current
• Number Of Channels: 1, UART
• Fifo's: 64 Byte
• Protocol: RS232, RS485
• Voltage - Supply: 2.5V, 3.3V, 5V
• With Auto Flow Control: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP (0.173", 4.40mm Width)
• Package: 24TSSOP
• Number Of Channels Per Chip: 1
• Maximum Data Rate: 5 Mbps
• Transmit Fifo: 64 Byte
• Transmitter And Receiver Fifo Counter: No
• Operating Supply Voltage: 2.5|3.3 V
• Minimum Single Supply Voltage: 2.3 V
• Maximum Processing Temperature: 260 °C
• Maximum Supply Current: 6 mA
• For Use With: 568-4000 - DEMO BOARD SPI/I2C TO DUAL UART568-3510 - DEMO BOARD SPI/I2C TO UART
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-4183-5; 935279278112; SC16IS750IPW; SC16IS750IPW

NXP Semiconductors
SC16IS740_750_760_6
Product data sheet
8.7 Modem Status Register (MSR)
This 8-bit register provides information about the current state of the control lines from the
modem, data set, or peripheral device to the host. It also indicates when a control input
from the modem changes state.
Table 18.
[1]
Remark: The primary inputs RI, CD, CTS, DSR are all active LOW.
Bit
7
6
5
4
3
2
1
0
Only available on SC16IS750/SC16IS760.
Symbol
MSR[7]
MSR[6]
MSR[5]
MSR[4]
MSR[3]
MSR[2]
MSR[1]
MSR[0]
Modem Status Register bits description
Description
CD
through IOControl register bit 1, the state of CD pin can be read from this
bit. This bit is the complement of the CD input. Reading IOState bit 6 does
not reflect the true state of CD pin.
RI
IOControl register bit 1, the state of RI pin can be read from this bit. This bit
is the complement of the RI input. Reading IOState bit 6 does not reflect the
true state of RI pin.
DSR
through IOControl register bit 1, the state of DSR pin can be read from this
bit. This bit is the complement of the DSR input. Reading IOState bit 4 does
not reflect the true state of DSR pin.
CTS (active HIGH, logical 1). This bit is the complement of the CTS input.
Cleared on a read.
Single UART with I
CD
RI
DSR
CTS. Indicates that CTS input has changed state. Cleared on a read.
[1]
Rev. 06 — 13 May 2008
[1]
[1]
(active HIGH, logical 1). If GPIO7 is selected as RI modem pin through
[1]
[1]
. Indicates that RI input has changed state from LOW to HIGH.
(active HIGH, logical 1). If GPIO6 is selected as CD modem pin
[1]
. Indicates that CD input has changed state. Cleared on a read.
(active HIGH, logical 1). If GPIO4 is selected as DSR modem pin
. Indicates that DSR input has changed state. Cleared on a read.
Table 18
2
shows Modem Status Register bit settings.
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
SC16IS740/750/760
© NXP B.V. 2008. All rights reserved.
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