SC16C654BIB64,128 NXP Semiconductors, SC16C654BIB64,128 Datasheet - Page 32
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SC16C654BIB64,128
Manufacturer Part Number
SC16C654BIB64,128
Description
IC QUAD UART 64BYTE 64LQFP
Manufacturer
NXP Semiconductors
Datasheet
1.SC16C654BIBS528.pdf
(58 pages)
Specifications of SC16C654BIB64,128
Features
False-start Bit Detection
Number Of Channels
4, QUART
Fifo's
64 Byte
Voltage - Supply
2.5V, 3.3V, 5V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935274936128
SC16C654BIB64-F
SC16C654BIB64-F
SC16C654BIB64-F
SC16C654BIB64-F
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SC16C654BIB64,128
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
9397 750 14965
Product data sheet
Table 19:
Bit
4
3
2
1
0
Symbol
MCR[4]
MCR[3]
MCR[2]
MCR[1]
MCR[0]
Modem Control Register bits description
Description
Loop-back. Enable the local loop-back mode (diagnostics). In this mode the
transmitter output (TX) and the receiver input (RX), CTS, DSR, CD, and RI are
disconnected from the SC16C654B/654DB I/O pins. Internally the modem
data and control pins are connected into a loop-back data configuration; see
Figure
operational. The Modem Control Interrupts are also operational, but the
interrupts’ sources are switched to the lower four bits of the Modem Control.
Interrupts continue to be controlled by the IER register.
OP2, INTx enable. Used to control the modem CD signal in the loop-back
mode.
OP1. This bit is used in the Loop-back mode only. In the loop-back mode, this
bit is used to write the state of the modem RI interface signal via OP1.
RTS
Automatic RTS may be used for hardware flow control by enabling EFR[6].
See
DTR
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs
logic 0 = disable loop-back mode (normal default condition)
logic 1 = enable local loop-back mode (diagnostics)
logic 0 = forces INTA-INTD outputs to the 3-state mode during the 16 mode
(normal default condition). In the loop-back mode, sets OP2 (CD) internally
to a logic 1.
logic 1 = forces the INTA-INTD outputs to the active mode during the
16 mode. In the loop-back mode, sets OP2 (CD) internally to a logic 0.
logic 0 = force RTS output to a logic 1 (normal default condition)
logic 1 = force RTS output to a logic 0
logic 0 = force DTR output to a logic 1 (normal default condition)
logic 1 = force DTR output to a logic 0
Table
Rev. 02 — 20 June 2005
12. In this mode, the receiver and transmitter interrupts remain fully
22.
SC16C654B/654DB
…continued
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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