SC28L198A1A,518 NXP Semiconductors, SC28L198A1A,518 Datasheet - Page 21
![IC UART OCTAL SOT189-3](/photos/6/98/69866/568-84-plcc_sot189-2_sml.jpg)
SC28L198A1A,518
Manufacturer Part Number
SC28L198A1A,518
Description
IC UART OCTAL SOT189-3
Manufacturer
NXP Semiconductors
Type
Octal UART for 3.3 V and 5 V supply voltager
Datasheet
1.SC28L198A1BE557.pdf
(57 pages)
Specifications of SC28L198A1A,518
Number Of Channels
8
Package / Case
84-LCC (J-Lead)
Features
False-start Bit Detection
Fifo's
16 Byte
Voltage - Supply
3.3V, 5V
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Data Rate
0.4608 MBd
Supply Voltage (max)
5.5 V
Supply Voltage (min)
3 V
Supply Current
150 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V or 5 V
Transmit Fifo
16Byte
Receive Fifo
16Byte
Transmitter And Receiver Fifo Counter
No
Operating Supply Voltage (typ)
3.3/5V
Package Type
PLCC
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935261323518
SC28L198A1A-T
SC28L198A1A-T
SC28L198A1A-T
SC28L198A1A-T
Philips Semiconductors
the transmitter. If this bit is a 1, the transmitter checks the state of
CTSN each time it is ready to begin sending a character. If it is
asserted (low), the character is transmitted. If it is negated (high),
the TxD output remains in the marking state and the transmission is
delayed until CTSN goes low. Changes in CTSN, while a character
is being transmitted, do not affect the transmission of that character.
This feature can be used to prevent overrun of a remote receiver.
MR2[3:2] – RxINT control field
Controls when interrupt arbitration for a receiver begins based on
RxFIFO fill level. This field allows interrupt arbitration to begin when
the RxFIFO is full, 3/4 full, 1/2 full or when it contains at least 1
Table 6. RxCSR and TxCSR – Receiver and Transmitter Clock Select Registers
Both registers consist of single 5 bit field that selects the clock source for the receiver and transmitter, respectively. The unused bits in this
register read b’111. The baud rates shown in the table below are based on the x1 crystal frequency of 3.6864MHz. The baud rates shown
below will vary as the X1 crystal clock varies. For example, if the X1 rate is changed to 7.3728 MHz all the rates below will double.
Table 7. Data Clock Mux
CCLK maximum rate is 8MHz. Data clock rates will follow exactly the ratio of CCLK to 3.6864MHz.
2006 Aug 10
Bits 7:5
Reserved
Clock Select Code
CSR (4:0)
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
Octal UART for 3.3 V and 5 V supply voltage
Clock selection,
CCLK = 3.6864 MHz
BRG – 50
BRG – 75
BRG – 150
BRG – 200
BRG – 300
BRG – 450
BRG – 600
BRG – 900
BRG – 1200
BRG – 1800
BRG – 2400
BRG – 3600
BRG – 4800
BRG – 7200
BRG – 9600
BRG – 14.4K
Bits 4:0
Transmitter/Receiver Clock select code, (see Clock Mux Table below)
21
Clock Select Code
10000
10001
10010
10011
10100
10101
10110
10111
11000
11001
11010
11011
11100
11101
11110
11111
character length of 5 bits, 1, 1.5 and 2 stop bits can be programmed.
character.
MR2[1:0] – Stop Bit Length Select
This field programs the length of the stop bit appended to the
transmitted character. Stop bit lengths of 9/16, 1, 1.5 and 2 bits can
be programmed for character lengths of 6, 7, and 8 bits. For a
In all cases, the receiver only checks for a mark condition at the
center of the first stop bit position (one bit time after the last data bit,
or after the parity bit if parity is enabled). If an external 1X clock is
used for the transmitter, MR2[1] = 0 selects one stop bit and MR2[1]
= 1 selects two stop bits to be transmitted.
Clock selection,
CCLK = 3.6864 MHz
BRG – 19.2K
BRG – 28.8K
BRG – 38.4K
BRG – 57.6K
BRG – 115.2K
BRG – 230.4K
G
G
BRG C/T 0
BRG C/T 1
Reserved
I/O2 rcvr, I/O3 xmit –16x
I/O2 rcvr, I/O3 xmit–1x
Reserved
Reserved
Reserved
IN
IN
0
1
SC28L198
Product data sheet