SC16C554IB64,157 NXP Semiconductors, SC16C554IB64,157 Datasheet - Page 34
![IC UART QUAD W/FIFO 64-LQFP](/photos/6/98/69856/568-64-lqfp_sot314-2_sml.jpg)
SC16C554IB64,157
Manufacturer Part Number
SC16C554IB64,157
Description
IC UART QUAD W/FIFO 64-LQFP
Manufacturer
NXP Semiconductors
Specifications of SC16C554IB64,157
Number Of Channels
4, QUART
Fifo's
16 Byte
Voltage - Supply
2.5V, 3.3V, 5V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
64-LQFP
Transmit Fifo
16Byte
Receive Fifo
16Byte
Transmitter And Receiver Fifo Counter
Yes
Data Rate
5Mbps
Package Type
LQFP
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-1321
935270074157
SC16C554IB64
935270074157
SC16C554IB64
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SC16C554IB64,157
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
9397 750 13132
Product data
Table 21:
Table 22:
[1]
Bit
5
4
3:0
Cont-3
0
1
0
1
X
X
X
1
0
1
When using software flow control the Xon/Xoff characters cannot be used for data transfer.
Symbol
EFR[5]
EFR[4]
EFR[3:0]
Cont-2
0
0
1
1
X
X
X
0
1
1
Enhanced Feature Register bits description
Software flow control functions
Quad UART with 16-byte FIFO and infrared (IrDA) encoder/decoder
Cont-1
X
X
X
X
0
1
0
1
1
1
Description
Special Character Detect.
Enhanced function control bit. The content of IER[7:4], ISR[5:4], and
MCR[6] can be modified and latched. After modifying any bits in the
enhanced registers, EFR[4] can be set to a logic 0 to latch the new
values. This feature prevents existing software from altering or
overwriting the SC16C554/554D enhanced functions.
Cont-3-0 Tx, Rx control. Logic 0 or cleared is the default condition.
Combinations of software flow control can be selected by programming
these bits. See
Rev. 05 — 10 May 2004
Logic 0 = Special character detect disabled (normal default condition).
Logic 1 = Special character detect enabled. The SC16C554/554D
compares each incoming receive character with Xoff2 data. If a match
exists, the received data will be transferred to FIFO and ISR[4] will be
set to indicate detection of special character. Bit-0 in the X-registers
corresponds with the LSB bit for the receive character. When this
feature is enabled, the normal software flow control must be disabled
(EFR[3-0] must be set to a logic 0).
Logic 0 = Disable (normal default condition).
Logic 1 = Enable.
Cont-0
X
X
X
X
0
0
1
1
1
1
Table
TX, RX software flow controls
No transmit flow control
Transmit Xon1/Xoff1
Transmit Xon2/Xoff2
Transmit Xon1 and Xon2/Xoff1 and Xoff2
No receive flow control
Receiver compares Xon1/Xoff1
Receiver compares Xon2/Xoff2
Transmit Xon1/Xoff1
Receiver compares Xon1 and Xon2, Xoff1 and Xoff2
Transmit Xon2/Xoff2
Receiver compares Xon1 and Xon2/Xoff1 and Xoff2
Transmit Xon1 and Xon2/Xoff1 and Xoff2
Receiver compares Xon1 and Xon2/Xoff1 and Xoff2
22.
[1]
SC16C554/554D
…continued
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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