LM49370RL/NOPB National Semiconductor, LM49370RL/NOPB Datasheet - Page 44

• Manufacturer Part Number: LM49370RL/NOPB
• Description: IC AUDIO SUBSYSTEM 1.2W 49USMDXT
• Manufacturer: National Semiconductor
• Series: Boomer®, PowerWise®r
• Type: Class Dr

Specifications of LM49370RL/NOPB

• Output Type: 1-Channel (Mono) with Mono and Stereo Headphones
• Max Output Power X Channels @ Load: 1.2W x 1 @ 8 Ohm; 52mW x 2 @ 16 Ohm
• Voltage - Supply: 2.5 V ~ 5.5 V
• Features: 3D, Depop, I²C, I²S, Microphone, Mute, PCM, Shutdown, SPI, Standby, Volume Control
• Mounting Type: Surface Mount
• Package / Case: 49-MicroSMDxt
• Dc: 07+
• For Use With: LM49370RLEVAL - BOARD EVALUATION LM49370RL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LM49370RLTR

12.29 HEADSET DETECT OVERVIEW
The LM49370 has built in monitors to automatically detect headset insertion or removal. The detection scheme can differentiate
between mono, stereo, mono-cellular and stereo-cellular headsets. Upon detection of headset insertion or removal, the LM49370
updates read-only bit 0 - headset absence/presence, bit 1- mono/stereo headset and bit 2 - headset without mic / with mic, of the
STATUS register (0x18h). Headset insertion/removal and headset type can also be detected in standby mode; this consumes no
analog supply current when the headset is absent.
The LM49370 can be programmed to raise an interrupt (set the IRQ pin high) when headset insert/removal is sensed by setting
bit 0 of DETECT (0x17h). When headset detection is enabled in active mode and a headset is not detected, the HPL_OUT and
HPR_OUT amplifiers will be disabled (switched off for capless mode and muted for AC-coupled mode) and the EXT_BIAS pin will
be disconnected from the MIC_BIAS amplifier, irrespective of control register settings.
The LM49370 also has the capability to detect button press, when a button is present on the headset microphone. Both parallel
button-type (in parallel with the headset microphone, default value) and series button-type (in series with the headset microphone)
can be detected; the button type used needs to be defined in bit 3 of MIC_2 (0x0Ch). Button press can also be detected in stand-
by mode; this consumes 10 µA of analog supply current for a series type push button and 100 µA for a parallel type push button.
Upon button press, the LM49370 updates bit 3 of STATUS (0x18h). In active OCL mode, with internal microphone selected
(INT_EXT = 0; (reg 0x0Bh)), if a parallel pushbutton headset is inserted into the system, INT_EXT must be set high before BTN
(bit 3 of STATUS (0x18h)) can be read. The LM49370 can also be programmed to raise an interrupt on the IRQ pin when button
press is sensed by setting bit 1 of DETECT (0x17h).
The LM49370 provides debounce programmability for headset and button detect. Debounce programmability can be used to reject
glitches generated, and hence avoid false detection, while inserting/removing a headset or pressing a button.
Headset insert/removal debounce time is defined by HS_DBNC_TIME; bits 6:3 of DETECT (0x17h). Parallel button press debounce
time is defined by BTN_DBNC_TIME; bits 5:4 of MIC_2 (0x0Ch).
Note that since the first effect of a series button press (microphone disconnected) is indistinguishable from headset removal, the
debounce time for series button press in defined by HS_DBNC_TIME.
Headset and push button detection can be enabled by setting CHIP_MODE 0; bit 0 of BASIC (0x00h). For reliable headset / push
button detection all following bits should be defined before enabling the headset detection system:
1) the OCL-bit (AC-Coupled / Capless headphone interface (bit 6 of HP_OUTPUT (0x15h))
2) the headset insert/removal debounce settings (bit 6:3 of DETECT (0x17h))
3) the BTN_TYPE-bit (Parallel / Series push button type (bit 3 of MIC_2 (0x0Ch))
4) the parallel push button debounce settings (bit 5:4 of MIC_2 (0x0Ch))
Figure 8 shows terminal connections and jack configuration for various headsets. Care should be taken to avoid any DC path from
the MIC_DET pin to ground when a headset is not inserted.
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